Lines Matching refs:SLM
3 … -mtriple=x86_64-unknown -mcpu=slm -basic-aa -slp-vectorizer -S | FileCheck %s --check-prefixes=SLM
24 ; SLM-LABEL: @loadext_2i8_to_2i64(
25 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <2 x i8>*
26 ; SLM-NEXT: [[TMP2:%.*]] = load <2 x i8>, <2 x i8>* [[TMP1]], align 1
27 ; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i64>
28 ; SLM-NEXT: ret <2 x i64> [[TMP3]]
53 ; SLM-LABEL: @loadext_4i8_to_4i32(
54 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <4 x i8>*
55 ; SLM-NEXT: [[TMP2:%.*]] = load <4 x i8>, <4 x i8>* [[TMP1]], align 1
56 ; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>
57 ; SLM-NEXT: ret <4 x i32> [[TMP3]]
90 ; SLM-LABEL: @loadext_4i8_to_4i64(
91 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <4 x i8>*
92 ; SLM-NEXT: [[TMP2:%.*]] = load <4 x i8>, <4 x i8>* [[TMP1]], align 1
93 ; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>
94 ; SLM-NEXT: ret <4 x i64> [[TMP3]]
127 ; SLM-LABEL: @loadext_8i8_to_8i16(
128 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <8 x i8>*
129 ; SLM-NEXT: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[TMP1]], align 1
130 ; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>
131 ; SLM-NEXT: ret <8 x i16> [[TMP3]]
180 ; SLM-LABEL: @loadext_8i8_to_8i32(
181 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <8 x i8>*
182 ; SLM-NEXT: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[TMP1]], align 1
183 ; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>
184 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
233 ; SLM-LABEL: @loadext_16i8_to_16i16(
234 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i8* [[P0:%.*]] to <16 x i8>*
235 ; SLM-NEXT: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[TMP1]], align 1
236 ; SLM-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>
237 ; SLM-NEXT: ret <16 x i16> [[TMP3]]
322 ; SLM-LABEL: @loadext_2i16_to_2i64(
323 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i16* [[P0:%.*]] to <2 x i16>*
324 ; SLM-NEXT: [[TMP2:%.*]] = load <2 x i16>, <2 x i16>* [[TMP1]], align 1
325 ; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>
326 ; SLM-NEXT: ret <2 x i64> [[TMP3]]
351 ; SLM-LABEL: @loadext_4i16_to_4i32(
352 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i16* [[P0:%.*]] to <4 x i16>*
353 ; SLM-NEXT: [[TMP2:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 1
354 ; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>
355 ; SLM-NEXT: ret <4 x i32> [[TMP3]]
388 ; SLM-LABEL: @loadext_4i16_to_4i64(
389 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i16* [[P0:%.*]] to <4 x i16>*
390 ; SLM-NEXT: [[TMP2:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 1
391 ; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>
392 ; SLM-NEXT: ret <4 x i64> [[TMP3]]
425 ; SLM-LABEL: @loadext_8i16_to_8i32(
426 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i16* [[P0:%.*]] to <8 x i16>*
427 ; SLM-NEXT: [[TMP2:%.*]] = load <8 x i16>, <8 x i16>* [[TMP1]], align 1
428 ; SLM-NEXT: [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>
429 ; SLM-NEXT: ret <8 x i32> [[TMP3]]
482 ; SLM-LABEL: @loadext_2i32_to_2i64(
483 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i32* [[P0:%.*]] to <2 x i32>*
484 ; SLM-NEXT: [[TMP2:%.*]] = load <2 x i32>, <2 x i32>* [[TMP1]], align 1
485 ; SLM-NEXT: [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>
486 ; SLM-NEXT: ret <2 x i64> [[TMP3]]
511 ; SLM-LABEL: @loadext_4i32_to_4i64(
512 ; SLM-NEXT: [[TMP1:%.*]] = bitcast i32* [[P0:%.*]] to <4 x i32>*
513 ; SLM-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 1
514 ; SLM-NEXT: [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>
515 ; SLM-NEXT: ret <4 x i64> [[TMP3]]