Home
last modified time | relevance | path

Searched refs:SETOLE (Results 1 – 25 of 39) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td157 // SETOGT/SETOGE/SETUGT/SETUGE will expand into SETOLT/SETOLE/SETULT/SETULE.
160 def : PatFPSetcc<SETOLE, FCMP_CLE_S, FPR32>;
185 def : PatFPSelectcc<SETOLE, FCMP_CLE_S, FSEL_S, FPR32>;
H A DLoongArchFloat64InstrInfo.td161 // SETOGT/SETOGE/SETUGT/SETUGE will expand into SETOLT/SETOLE/SETULT/SETULE.
164 def : PatFPSetcc<SETOLE, FCMP_CLE_D, FPR64>;
185 def : PatFPSelectcc<SETOLE, FCMP_CLE_D, FSEL_D, FPR64>;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1431 SETOLE, // 0 1 0 1 True if ordered and less than or equal enumerator
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td362 defm : BRCond_Bin_SWAP_F2<SETOLE, "f2FCMPHS", BT32, MVC32>;
386 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)), bb:$imm16),
388 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)),
390 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td342 defm : BRCond_Bin_SWAP<SETOLE, "FCMPHS", BT32, MVC32>;
362 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETOLE)), bb:$imm16),
364 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETOLE)),
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAnalysis.cpp194 case FCmpInst::FCMP_OLE: return ISD::SETOLE; in getFCmpCondCode()
214 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp75 case ISD::SETOLE: in fpCondCode2Fcc()
H A DVEInstrInfo.td2097 def : Pat<(f64 (selectcc f64:$LHS, f64:$RHS, f64:$LHS, f64:$RHS, SETOLE)),
2099 def : Pat<(f32 (selectcc f32:$LHS, f32:$RHS, f32:$LHS, f32:$RHS, SETOLE)),
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td84 defm LE : ComparisonFP<SETOLE, "le ", 0x5f, 0x65>;
H A DWebAssemblyInstrSIMD.td730 defm LE : SIMDConditionFP<"le", SETOLE, 69>;
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZfh.td319 def : PatSetCC<FPR16, strict_fsetcc, SETOLE, PseudoQuietFLE_H>;
337 def : PatSetCC<FPR16, any_fsetccs, SETOLE, FLE_H>;
H A DRISCVInstrInfoD.td317 def : PatSetCC<FPR64, strict_fsetcc, SETOLE, PseudoQuietFLE_D>;
335 def : PatSetCC<FPR64, any_fsetccs, SETOLE, FLE_D>;
H A DRISCVInstrInfoF.td547 def : PatSetCC<FPR32, strict_fsetcc, SETOLE, PseudoQuietFLE_S>;
565 def : PatSetCC<FPR32, any_fsetccs, SETOLE, FLE_S>;
H A DRISCVInstrInfoVSDPatterns.td964 defm : VPatFPSetCCSDNode_VV_VF_FV<SETOLE, "PseudoVMFLE", "PseudoVMFGE">;
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp450 case ISD::SETOLE: return "setole"; in getOperationName()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td330 def COND_OLE : PatFrags<(ops), [(OtherVT SETOLE), (OtherVT SETLE)]>;
H A DSIWholeQuadMode.cpp870 case ISD::SETOLE: in lowerKillF32()
H A DR600ISelLowering.cpp87 ISD::SETOLE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGE, in R600TargetLowering()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4064 case ISD::SETOLE: in SelectCC()
4091 case ISD::SETOLE: in SelectCC()
4120 case ISD::SETOLE: in getPredicateForSetCC()
4173 case ISD::SETOLE: in getCRIdxForSetCC()
4196 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp858 case ISD::SETOLE: in IntCondCCodeToICC()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1559 case ISD::SETOLE: in TranslateM68kCC()
1582 case ISD::SETOLE: // flipped in TranslateM68kCC()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp301 setCondCodeAction(ISD::SETOLE, MVT::v64f16, Expand); in initializeHVXLowering()
314 setCondCodeAction(ISD::SETOLE, MVT::v32f32, Expand); in initializeHVXLowering()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td746 def SETOLE : CondCode<"FCMP_OLE">;
1354 (setcc node:$lhs, node:$rhs, SETOLE)>;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td1794 defm FCMGE_PPzZZ : sve_fp_3op_p_pd_cc<0b000, "fcmge", SETOGE, SETGE, SETOLE, SETLE>;
1802 defm FCMGE_PPzZ0 : sve_fp_2op_p_pd<0b000, "fcmge", SETOGE, SETGE, SETOLE, SETLE>;
1805 defm FCMLE_PPzZ0 : sve_fp_2op_p_pd<0b011, "fcmle", SETOLE, SETLE, SETOGE, SETGE>;
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp551 case ISD::SETOLE: in getPTXCmpMode()

12