| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperators.td | 12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 18 [SDTCisVT<0, i32>, 21 [SDTCisVT<0, i32>, 23 SDTCisVT<3, i32>]>; 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 32 SDTCisVT<3, i32>, [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrFragmentsSIMD.td | 19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>; 22 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>; 36 SDTCisVT<3, i8>]>; 89 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>, 92 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>, 96 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; 99 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; 102 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>; 215 SDTCisVT<3, i8>]>; 228 SDTypeProfile<1, 1, [SDTCisVT<0, v8i16>, SDTCisVT<1, v8i16>]>>; [all …]
|
| H A D | X86InstrInfo.td | 26 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>; 53 SDTCisVT<1, i8>, SDTCisVT<2, i32>]>; 57 SDTCisVT<1, i8>, SDTCisVT<2, i32>]>; 60 SDTCisVT<1, i8>, SDTCisVT<2, i32>]>; 62 def SDTX86sahf : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i8>]>; 66 def SDTX86rdpkru : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; 67 def SDTX86wrpkru : SDTypeProfile<0, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, 116 def SDT_X86SEG_ALLOCA : SDTypeProfile<1, 1, [SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 310 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>, 315 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>, [all …]
|
| H A D | X86InstrTSX.td | 17 def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,
|
| H A D | X86InstrMMX.td | 232 [SDTCisVT<0, x86mmx>, SDTCisVT<1, v2i64>]>>; 234 [SDTCisVT<0, v2i64>, SDTCisVT<1, x86mmx>]>>;
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstrInfo.td | 49 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>] 53 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>] 57 [SDTCisVT<0, i1>, SDTCisVT<1, OtherVT>] 61 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, i1>] 73 SDCallSeqStart<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>, 78 SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>, 94 SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>, 99 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>, 100 SDTCisVT<0, iPTR>]> 192 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> [all …]
|
| H A D | SIInstrInfo.td | 44 SDTypeProfile<1, 3, [SDTCisVT<1, v4i32>, SDTCisVT<2, i32>, SDTCisVT<3, i32>]>, 49 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i16>]>, 82 SDTCisVT<1, v4i32>, // rsrc 100 SDTCisVT<1, v4i32>, // rsrc 118 SDTCisVT<1, v4i32>, // rsrc 144 SDTCisVT<1, v4i32>, // rsrc 169 [SDTCisVT<2, v4i32>, // rsrc 225 [SDTCisVT<0, i32>, // dst 226 SDTCisVT<1, i32>, // src 227 SDTCisVT<2, i32>, // cmp [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.td | 22 def MxSDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; 23 def MxSDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; 28 /* ADJ */ SDTCisVT<0, i32> 37 /* CCR */ SDTCisVT<1, i8>, 44 /* CCR */ SDTCisVT<1, i8>, 68 /* CCR */ SDTCisVT<0, i8>, 75 /* Cond */ SDTCisVT<3, i8>, 76 /* CCR */ SDTCisVT<4, i8> 82 /* CCR */ SDTCisVT<2, i8> 88 /* CCR */ SDTCisVT<2, i8> [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoVVLPatterns.td | 29 SDTCisVT<4, XLenVT>]>; 35 SDTCisVT<3, XLenVT>]>; 41 SDTCisVT<4, XLenVT>]>; 46 SDTCisVT<2, XLenVT>, 56 SDTCisVT<2, XLenVT>, 106 SDTCisVT<5, XLenVT>]>; 179 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>, SDTCisVT<4, XLenVT> 204 SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>, 214 SDTCisVT<3, XLenVT>]>; 230 SDTCisVT<4, XLenVT>]>; [all …]
|
| H A D | RISCVInstrInfoF.td | 19 : SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisVT<1, i64>]>; 21 : SDTypeProfile<1, 1, [SDTCisVT<0, i64>, SDTCisVT<1, f32>]>; 23 : SDTypeProfile<1, 2, [SDTCisVT<0, i64>, SDTCisFP<1>, 24 SDTCisVT<2, i64>]>; 26 : SDTypeProfile<1, 2, [SDTCisVT<0, XLenVT>, SDTCisFP<1>, 27 SDTCisVT<2, XLenVT>]>;
|
| H A D | RISCVInstrInfoD.td | 18 def SDT_RISCVBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>, 19 SDTCisVT<1, i32>, 21 def SDT_RISCVSplitF64 : SDTypeProfile<2, 1, [SDTCisVT<0, i32>, 22 SDTCisVT<1, i32>, 23 SDTCisVT<2, f64>]>;
|
| H A D | RISCVInstrInfo.td | 18 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, 19 SDTCisVT<1, i32>]>; 20 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, 21 SDTCisVT<1, i32>]>; 24 def SDT_RISCVCall : SDTypeProfile<0, -1, [SDTCisVT<0, XLenVT>]>; 26 SDTCisVT<3, OtherVT>, 30 SDTCisVT<2, OtherVT>, 31 SDTCisVT<3, OtherVT>]>; 39 SDTCisSameAs<0, 1>, SDTCisVT<0, i64> 42 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64> [all …]
|
| H A D | RISCVInstrInfoZfh.td | 19 : SDTypeProfile<1, 1, [SDTCisVT<0, f16>, SDTCisVT<1, XLenVT>]>; 21 : SDTypeProfile<1, 1, [SDTCisVT<0, XLenVT>, SDTCisVT<1, f16>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 77 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 78 SDTCisVT<1, iPTR>]>; 80 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 82 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 83 def SDT_WebAssemblyLocalGet : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 84 def SDT_WebAssemblyLocalSet : SDTypeProfile<0, 2, [SDTCisVT<0, i32>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFloat32InstrInfo.td | 18 : SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisVT<1, i64>]>; 20 : SDTypeProfile<1, 1, [SDTCisVT<0, i64>, SDTCisVT<1, f32>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 24 def SDT_LanaiCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, 25 SDTCisVT<1, i32>]>; 26 def SDT_LanaiCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, 27 SDTCisVT<1, i32>]>; 28 def SDT_LanaiCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>; 32 def SDT_LanaiSetCC : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, 33 SDTCisVT<1, i32>]>; 34 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, 35 SDTCisVT<1, i32>]>; 36 def SDT_LanaiAdjDynAlloc : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.td | 18 def SDT_BPFCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 19 SDTCisVT<1, iPTR>]>; 20 def SDT_BPFCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 21 def SDT_BPFCall : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>; 27 SDTCisVT<3, OtherVT>]>; 30 def SDT_BPFMEMCPY : SDTypeProfile<0, 4, [SDTCisVT<0, i64>, 31 SDTCisVT<1, i64>, 32 SDTCisVT<2, i64>, 33 SDTCisVT<3, i64>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsInstrFPU.td | 27 SDTCisVT<1, i32>, 28 SDTCisVT<2, OtherVT>]>; 30 SDTCisVT<2, i32>]>; 31 def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>, 34 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>, 35 SDTCisVT<1, i32>, 37 def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, 38 SDTCisVT<1, f64>, 39 SDTCisVT<2, i32>]>; 41 def SDT_MipsMTC1_D64 : SDTypeProfile<1, 1, [SDTCisVT<0, f64>, [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.td | 20 def SDT_ARMCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>; 22 [SDTCisVT<0, i32>, SDTCisVT<1, i32>, 23 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>; 34 [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>; 45 SDTCisVT<1, i32>, SDTCisVT<2, i32>, 46 SDTCisVT<3, i32>, SDTCisVT<4, i32>, 50 [SDTCisVT<0, i32>, SDTCisVT<1, i32>, 71 def SDT_ARMBFI : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, 72 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>; 76 def SDT_ARMMEMCPY : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 18 class SDTCisI8<int OpNum> : SDTCisVT<OpNum, i8>; 19 class SDTCisI16<int OpNum> : SDTCisVT<OpNum, i16>; 24 def SDT_MSP430Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>; 25 def SDT_MSP430CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i16>, 26 SDTCisVT<1, i16>]>; 27 def SDT_MSP430CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i16>, SDTCisVT<1, i16>]>; 31 def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, 32 SDTCisVT<1, i8>]>; 35 SDTCisVT<3, i8>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.td | 19 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, 20 SDTCisVT<1, i32>]>; 22 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, 23 SDTCisVT<1, i32>]>; 25 def SDT_CSKYCall : SDTypeProfile<0, 2, [SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 27 def SDT_CSKYCallReg : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>; 29 def SDT_CSKY_LOADADDR : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, 30 SDTCisVT<1, iPTR>, SDTCisVT<2, iPTR>]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 62 def SDT_PPCSplat32 : SDTypeProfile<1, 3, [ SDTCisVT<0, v2i64>, 66 SDTCisVT<0, v512i1>, SDTCisVT<1, v4i32>, SDTCisVT<2, v4i32>, 67 SDTCisVT<3, v4i32>, SDTCisVT<4, v4i32> 70 SDTCisVT<0, v256i1>, SDTCisVT<1, v4i32>, SDTCisVT<2, v4i32> 73 SDTCisVT<0, v4i32>, SDTCisVT<1, v512i1>, SDTCisPtrTy<2> 76 SDTCisVT<0, v4i32>, SDTCisVT<1, v256i1>, SDTCisPtrTy<2> 79 SDTCisVT<0, v512i1>, SDTCisVT<1, v512i1> 103 SDTCisVT<0, v1i128>, SDTCisPtrTy<1>, SDTCisPtrTy<2>
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 222 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>; 226 SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisFP<1>]>; 228 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>; 230 SDTypeProfile<1, 1, [SDTCisVT<0, f64>, SDTCisFP<1>]>; 232 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f64>]>; 261 def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32>, 262 SDTCisVT<1, i32> ]>; 263 def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, 264 SDTCisVT<1, i32> ]>; 271 def SDT_SPCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>; [all …]
|
| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 25 // SDTCisVT - The specified operand has exactly this VT. 26 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> { 108 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'. 168 SDTCisInt<0>, SDTCisFP<1>, SDTCisSameNumEltsAs<0, 1>, SDTCisVT<2, OtherVT> 171 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>, 180 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> 193 SDTCisVT<5, OtherVT> 197 SDTCisVT<0, OtherVT> 201 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT> 205 SDTCisInt<0>, SDTCisVT<1, OtherVT> [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 94 SDTCisVT<3,i32>]>; 392 : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisPtrTy<0>]>; 984 SDTCisInt<0>, SDTCisVT<3, i32>, SDTCisVT<4, i32>]>; 1000 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>; 1041 [SDTCisVT<0, i64>, SDTCisVT<1, i32>, SDTCisSameAs<1, 2>]>; 1858 SDTypeProfile<1, 2, [SDTCisVT<0, i1>, SDTCisVT<1, i32>, SDTCisVT<2, i32>]>; 1925 : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i32>]>; 1927 : SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; 3133 : SDCallSeqStart<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; 3135 : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>; [all …]
|