Searched refs:Ry (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 282 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperand() local
284 if (DecodeGPRRegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperand()
288 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Ry + Imm5])); in DecodeRegSeqOperand()
299 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperandF1() local
301 if (DecodesFPR32RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandF1()
316 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperandD1() local
318 if (DecodesFPR64RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandD1()
333 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperandF2() local
335 if (DecodeFPR32RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandF2()
350 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperandD2() local
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 265 unsigned Ry = MI.getOperand(Idx).getReg(); in getRegSeqImmOpValue() local
269 Ctx.getRegisterInfo()->getEncodingValue(Ry); in getRegSeqImmOpValue()
271 return ((Ctx.getRegisterInfo()->getEncodingValue(Ry) << 5) | Imm); in getRegSeqImmOpValue()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 1494 auto Ry = Operands.back()->getReg(); in parseRegSeq() local
1512 Operands.push_back(CSKYOperand::createRegSeq(Ry, Rz, S)); in parseRegSeq()
1528 auto Ry = Operands.back()->getReg(); in parseRegList() local
1542 reglist.push_back(Ry); in parseRegList()
1551 reglist.push_back(Ry); in parseRegList()
1552 reglist.push_back(Ry); in parseRegList()
1556 reglist.push_back(Ry); in parseRegList()
1557 reglist.push_back(Ry); in parseRegList()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1325 MCOperand &Ry = Inst.getOperand(1); in processInstruction() local
1326 if (Rx.getReg() != Hexagon::R0 || Ry.getReg() != Hexagon::R0) { in processInstruction()
1355 MCOperand &Ry = Inst.getOperand(0); in processInstruction() local
1357 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrArithmetic.td | 321 /// x x x x | REG Rx | 1 | SIZE | 0 0 | M | REG Ry
324 /// Ry - source
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 1708 def: Pat<(add I32:$Ru, (Su<Mul> I32:$Ry, I32:$Rs)),
1709 (M4_mpyrr_addr IntRegs:$Ru, IntRegs:$Ry, IntRegs:$Rs)>;
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