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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp622 Register Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0); in emitEntryFunctionScratchRsrcRegSetup() local
625 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup()