Searched refs:ResLo (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5250 SDValue ResHi, ResLo; in Select() local
5265 ResLo = SDValue(CNode, 1); in Select()
5288 ResLo = SDValue(CNode, 1); in Select()
5298 if (!ResLo) { in Select()
5300 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, in Select()
5302 InFlag = ResLo.getValue(2); in Select()
5304 ReplaceUses(SDValue(Node, 0), ResLo); in Select()
5305 LLVM_DEBUG(dbgs() << "=> "; ResLo.getNode()->dump(CurDAG); in Select()
|
| H A D | X86ISelLowering.cpp | 46104 SDValue ResLo = in reduceVMULWidth() local
46106 ResLo = DAG.getBitcast(ResVT, ResLo); in reduceVMULWidth()
46115 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, ResLo, ResHi); in reduceVMULWidth()
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1039 SDValue ResLo = CurDAG.getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); in performMADD_MSUBCombine() local
1042 CurDAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, ResLo, ResHi); in performMADD_MSUBCombine()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 2911 SDValue ResLo = in SplitVecOp_VP_REDUCE() local
2913 return DAG.getNode(Opc, dl, ResVT, {ResLo, Hi, MaskHi, EVLHi}, Flags); in SplitVecOp_VP_REDUCE()
|
| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 15788 Value *ResLo = Builder.CreateZExt( in EmitPPCBuiltinExpr() local
15793 return Builder.CreateOr(ResLo, ResHi); in EmitPPCBuiltinExpr()
|