Searched refs:RegisterSubReg (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenPredicate.cpp | 50 struct RegisterSubReg { struct
73 RegisterSubReg Reg;
106 using RegToRegMap = std::map<RegisterSubReg, RegisterSubReg>;
122 RegisterSubReg getPredRegFor(const RegisterSubReg &Reg);
244 RegisterSubReg HexagonGenPredicate::getPredRegFor(const RegisterSubReg &Reg) { in getPredRegFor()
279 return RegisterSubReg(NewPR); in getPredRegFor()
322 std::queue<RegisterSubReg> WorkQ; in isScalarPred()
326 RegisterSubReg PR = WorkQ.front(); in isScalarPred()
377 RegisterSubReg Reg(MO); in convertToPredForm()
415 RegisterSubReg OutR(Op0); in convertToPredForm()
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| H A D | HexagonConstPropagation.cpp | 85 struct RegisterSubReg { struct
364 bool evaluateCMPrr(uint32_t Cmp, const RegisterSubReg &R1, const RegisterSubReg &R2,
381 bool evaluateANDrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
386 bool evaluateORrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
391 bool evaluateXORrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
634 RegisterSubReg DefR(MD); in visitPHI()
661 RegisterSubReg UseR(SO); in visitPHI()
704 RegisterSubReg DefR(MO); in visitNonBranch()
1936 RegisterSubReg DefR(MD); in evaluate()
2294 RegisterSubReg PR(MD); in evaluate()
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