Lines Matching refs:RegisterSubReg

50   struct RegisterSubReg {  struct
54 RegisterSubReg(unsigned r = 0, unsigned s = 0) : R(r), S(s) {} in RegisterSubReg() function
55 RegisterSubReg(const MachineOperand &MO) : R(MO.getReg()), S(MO.getSubReg()) {} in RegisterSubReg() function
56 RegisterSubReg(const Register &Reg) : R(Reg), S(0) {} in RegisterSubReg() function
58 bool operator== (const RegisterSubReg &Reg) const { in operator ==() argument
62 bool operator< (const RegisterSubReg &Reg) const { in operator <() argument
70 PrintRegister(RegisterSubReg R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {} in PrintRegister()
73 RegisterSubReg Reg;
105 using SetOfReg = std::set<RegisterSubReg>;
106 using RegToRegMap = std::map<RegisterSubReg, RegisterSubReg>;
117 void processPredicateGPR(const RegisterSubReg &Reg);
121 bool isScalarPred(RegisterSubReg PredReg);
122 RegisterSubReg getPredRegFor(const RegisterSubReg &Reg);
215 RegisterSubReg RD = MI.getOperand(0); in collectPredicateGPR()
225 void HexagonGenPredicate::processPredicateGPR(const RegisterSubReg &Reg) { in processPredicateGPR()
244 RegisterSubReg HexagonGenPredicate::getPredRegFor(const RegisterSubReg &Reg) { in getPredRegFor()
259 RegisterSubReg PR = DefI->getOperand(1); in getPredRegFor()
276 G2P.insert(std::make_pair(Reg, RegisterSubReg(NewPR))); in getPredRegFor()
277 LLVM_DEBUG(dbgs() << " -> !" << PrintRegister(RegisterSubReg(NewPR), *TRI) in getPredRegFor()
279 return RegisterSubReg(NewPR); in getPredRegFor()
321 bool HexagonGenPredicate::isScalarPred(RegisterSubReg PredReg) { in isScalarPred()
322 std::queue<RegisterSubReg> WorkQ; in isScalarPred()
326 RegisterSubReg PR = WorkQ.front(); in isScalarPred()
355 WorkQ.push(RegisterSubReg(MO.getReg())); in isScalarPred()
377 RegisterSubReg Reg(MO); in convertToPredForm()
404 RegisterSubReg PR = getPredRegFor(MI->getOperand(1)); in convertToPredForm()
415 RegisterSubReg OutR(Op0); in convertToPredForm()
421 RegisterSubReg NewPR = MRI->createVirtualRegister(PredRC); in convertToPredForm()
426 RegisterSubReg GPR = MI->getOperand(i); in convertToPredForm()
427 RegisterSubReg Pred = getPredRegFor(GPR); in convertToPredForm()
445 RegisterSubReg R(NewOutR); in convertToPredForm()
472 RegisterSubReg DR = MI.getOperand(0); in eliminatePredCopies()
473 RegisterSubReg SR = MI.getOperand(1); in eliminatePredCopies()
508 for (const RegisterSubReg &R : PredGPRs) in runOnMachineFunction()