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Searched refs:RegisterMCInstrAnalysis (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVMCTargetDesc.cpp98 TargetRegistry::RegisterMCInstrAnalysis(*T, createSPIRVInstrAnalysis); in LLVMInitializeSPIRVTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMCTargetDesc.cpp113 TargetRegistry::RegisterMCInstrAnalysis(*T, createLoongArchInstrAnalysis); in LLVMInitializeLoongArchTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCTargetDesc.cpp124 TargetRegistry::RegisterMCInstrAnalysis(*T, createBPFInstrAnalysis); in LLVMInitializeBPFTargetMC()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DTargetRegistry.h858 static void RegisterMCInstrAnalysis(Target &T, in RegisterMCInstrAnalysis() function
1218 template <class MCInstrAnalysisImpl> struct RegisterMCInstrAnalysis { struct
1219 RegisterMCInstrAnalysis(Target &T) { in RegisterMCInstrAnalysis() function
1220 TargetRegistry::RegisterMCInstrAnalysis(T, &Allocator); in RegisterMCInstrAnalysis()
1239 TargetRegistry::RegisterMCInstrAnalysis(T, Fn); in RegisterMCInstrAnalysisFn() argument
/llvm-project-15.0.7/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCTargetDesc.cpp166 TargetRegistry::RegisterMCInstrAnalysis(getTheLanaiTarget(), in LLVMInitializeLanaiTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp156 TargetRegistry::RegisterMCInstrAnalysis(*T, createAMDGPUMCInstrAnalysis); in LLVMInitializeAMDGPUTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCTargetDesc.cpp173 TargetRegistry::RegisterMCInstrAnalysis(CSKYTarget, createCSKYInstrAnalysis); in LLVMInitializeCSKYTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCTargetDesc.cpp177 TargetRegistry::RegisterMCInstrAnalysis(*T, createRISCVInstrAnalysis); in LLVMInitializeRISCVTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.cpp195 TargetRegistry::RegisterMCInstrAnalysis(*T, createMipsMCInstrAnalysis); in LLVMInitializeMipsTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp414 TargetRegistry::RegisterMCInstrAnalysis(*T, createPPCMCInstrAnalysis); in LLVMInitializePowerPCTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCTargetDesc.cpp648 TargetRegistry::RegisterMCInstrAnalysis(getTheHexagonTarget(), in LLVMInitializeHexagonTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp683 TargetRegistry::RegisterMCInstrAnalysis(*T, createARMMCInstrAnalysis); in LLVMInitializeARMTargetMC()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp481 TargetRegistry::RegisterMCInstrAnalysis(*T, createAArch64InstrAnalysis); in LLVMInitializeAArch64TargetMC()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp713 TargetRegistry::RegisterMCInstrAnalysis(*T, createX86MCInstrAnalysis); in LLVMInitializeX86TargetMC()