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Searched refs:RegTypes (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/test/TableGen/
H A DRegisterClass.td7 def ClassA : RegisterClass<"MyTarget", [], 32, (add R0)>; // CHECK: [[@LINE]]:1: error: RegTypes li…
H A DTargetInstrSpec.td43 list<ValueType> RegTypes = regTypes;
H A Dcast.td42 list<ValueType> RegTypes = regTypes;
H A DSlice.td36 list<ValueType> RegTypes = regTypes;
H A DMultiPat.td46 list<ValueType> RegTypes = regTypes;
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td880 def AV_32 : SIRegisterClass<"AMDGPU", VGPR_32.RegTypes, 32, (add VGPR_32, AGPR_32)> {
901 defm AV_64 : AVRegClass<2, VReg_64.RegTypes, (add VGPR_64), (add AGPR_64)>;
902 defm AV_96 : AVRegClass<3, VReg_96.RegTypes, (add VGPR_96), (add AGPR_96)>;
903 defm AV_128 : AVRegClass<4, VReg_128.RegTypes, (add VGPR_128), (add AGPR_128)>;
904 defm AV_160 : AVRegClass<5, VReg_160.RegTypes, (add VGPR_160), (add AGPR_160)>;
905 defm AV_192 : AVRegClass<6, VReg_192.RegTypes, (add VGPR_192), (add AGPR_192)>;
906 defm AV_224 : AVRegClass<7, VReg_224.RegTypes, (add VGPR_224), (add AGPR_224)>;
907 defm AV_256 : AVRegClass<8, VReg_256.RegTypes, (add VGPR_256), (add AGPR_256)>;
908 defm AV_512 : AVRegClass<16, VReg_512.RegTypes, (add VGPR_512), (add AGPR_512)>;
909 defm AV_1024 : AVRegClass<32, VReg_1024.RegTypes, (add VGPR_1024), (add AGPR_1024)>;
H A DDSInstructions.td891 foreach vt = VReg_64.RegTypes in {
895 foreach vt = VReg_128.RegTypes in {
903 foreach vt = VReg_64.RegTypes in {
910 foreach vt = VReg_96.RegTypes in {
915 foreach vt = VReg_128.RegTypes in {
926 foreach vt = VReg_64.RegTypes in {
933 foreach vt = VReg_96.RegTypes in {
942 foreach vt = VReg_128.RegTypes in {
H A DSMInstructions.td931 foreach vt = SReg_64.RegTypes in {
935 foreach vt = SReg_128.RegTypes in {
939 foreach vt = SReg_256.RegTypes in {
943 foreach vt = SReg_512.RegTypes in {
H A DFLATInstructions.td1136 foreach vt = VReg_64.RegTypes in {
1143 foreach vt = VReg_128.RegTypes in {
1363 foreach vt = VReg_64.RegTypes in {
1370 foreach vt = VReg_128.RegTypes in {
1508 foreach vt = VReg_64.RegTypes in {
1515 foreach vt = VReg_128.RegTypes in {
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrTable.td54 foreach vt = rc.RegTypes in {
H A DWebAssemblyInstrInfo.td344 foreach vt = rc.RegTypes in {
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp3434 const char RegTypes[] = {'g', 'o', 'l', 'i'}; in getRegForInlineAsmConstraint() local
3435 char RegType = RegTypes[RegNo / 8]; in getRegForInlineAsmConstraint()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTarget.td229 list<ValueType> RegTypes = regTypes;
/llvm-project-15.0.7/llvm/docs/
H A DWritingAnLLVMBackend.rst486 list<ValueType> RegTypes = regTypes;