Searched refs:RegLoc (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfDebug.cpp | 732 Register RegLoc = ParamValue->first.getReg(); in interpretValues() local
735 bool IsSPorFP = (RegLoc == SP) || (RegLoc == FP); in interpretValues()
736 if (TRI.isCalleeSavedPhysReg(RegLoc, *MF) || IsSPorFP) { in interpretValues()
737 MachineLocation MLoc(RegLoc, /*Indirect=*/IsSPorFP); in interpretValues()
747 addToFwdRegWorklist(TmpWorklistItems, RegLoc, ParamValue->second, in interpretValues()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 4482 SMLoc RegLoc = Parser.getTok().getLoc(); in parseRegisterList() local
4488 return Error(RegLoc, "register expected"); in parseRegisterList()
4562 RegLoc = Parser.getTok().getLoc(); in parseRegisterList()
4567 return Error(RegLoc, "register expected"); in parseRegisterList()
4764 SMLoc RegLoc = Parser.getTok().getLoc(); in parseVectorList() local
4768 Error(RegLoc, "register expected"); in parseVectorList()
4847 RegLoc = Parser.getTok().getLoc(); in parseVectorList()
4851 Error(RegLoc, "register expected"); in parseVectorList()
4872 Error(RegLoc, in parseVectorList()
4878 Error(RegLoc, "non-contiguous register range"); in parseVectorList()
[all …]
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | InstrRefLDVTest.cpp | 782 LocIdx RegLoc = MTracker->getRegMLoc(getRegByName(SubRegNames[I])); in TEST_F() local
783 ValueIDNum DefNum(0, 1, RegLoc); in TEST_F()
834 LocIdx RegLoc = MTracker->getRegMLoc(getRegByName(SubRegNames[I])); in TEST_F() local
835 ValueIDNum DefNum(0, 1, RegLoc); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 2844 SMLoc RegLoc; in HandleAVX512Operand() local
2845 if (!ParseRegister(RegNo, RegLoc, StartLoc) && in HandleAVX512Operand()
2848 return Error(RegLoc, "Register k0 can't be used as write mask"); in HandleAVX512Operand()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3498 SMLoc RegLoc = getRegLoc(LastSGPR, Operands); in validateConstantBusLimitations() local
3499 SMLoc Loc = (LitLoc.getPointer() < RegLoc.getPointer()) ? RegLoc : LitLoc; in validateConstantBusLimitations()
4427 SMLoc RegLoc = getRegLoc(Reg, Operands); in validateGWS() local
4428 Error(RegLoc, "vgpr must be even aligned"); in validateGWS()
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