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Searched refs:RegF (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/MC/
H A DMCWin64EH.cpp711 unsigned RegI = 0, RegF = 0; in tryARM64PackedUnwind() local
803 if (Location != FloatRegs || RegF == 0 || Inst.Register != 8 + RegF || in tryARM64PackedUnwind()
806 RegF += 1; in tryARM64PackedUnwind()
813 RegF = 2; in tryARM64PackedUnwind()
818 Inst.Register != 8 + RegF || in tryARM64PackedUnwind()
821 RegF += 2; in tryARM64PackedUnwind()
828 RegF += 2; in tryARM64PackedUnwind()
877 if (RegI > 10 || RegF > 8) in tryARM64PackedUnwind()
899 int FpSZ = 8 * RegF; // RegF not yet decremented in tryARM64PackedUnwind()
911 if (RegF > 0) in tryARM64PackedUnwind()
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/llvm-project-15.0.7/llvm/lib/Transforms/IPO/
H A DCalledValuePropagation.cpp307 auto RegF = CVPLatticeKey(I.getFalseValue(), IPOGrouping::Register); in visitSelect() local
309 MergeValues(SS.getValueState(RegT), SS.getValueState(RegF)); in visitSelect()
/llvm-project-15.0.7/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.cpp1239 SW.printNumber("RegF", RF.RegF()); in dumpPackedARM64Entry()
1253 int FpSZ = 8 * RF.RegF(); in dumpPackedARM64Entry()
1254 if (RF.RegF()) in dumpPackedARM64Entry()
1277 if (RF.RegI() > 0 || RF.RegF() > 0 || RF.CR() == 1) { in dumpPackedARM64Entry()
1286 int FloatRegs = RF.RegF() > 0 ? RF.RegF() + 1 : 0; in dumpPackedARM64Entry()
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DARMWinEH.h258 uint8_t RegF() const { in RegF() function