711   unsigned RegI = 0, RegF = 0;  in tryARM64PackedUnwind()  local
803       if (Location != FloatRegs || RegF == 0 || Inst.Register != 8 + RegF ||  in tryARM64PackedUnwind()
804           Inst.Offset != 8 * (RegI + (StandaloneLR ? 1 : 0) + RegF))  in tryARM64PackedUnwind()
806       RegF += 1;  in tryARM64PackedUnwind()
813       RegF = 2;  in tryARM64PackedUnwind()
818           Inst.Register != 8 + RegF ||  in tryARM64PackedUnwind()
819           Inst.Offset != 8 * (RegI + (StandaloneLR ? 1 : 0) + RegF))  in tryARM64PackedUnwind()
821       RegF += 2;  in tryARM64PackedUnwind()
828         RegF += 2;  in tryARM64PackedUnwind()
877   if (RegI > 10 || RegF > 8)  in tryARM64PackedUnwind()
899   int FpSZ = 8 * RegF; // RegF not yet decremented  in tryARM64PackedUnwind()
910   assert(RegF != 1 && "One single float reg not allowed");  in tryARM64PackedUnwind()
911   if (RegF > 0)  in tryARM64PackedUnwind()
912     RegF--; // Convert from actual number of registers, to value stored  in tryARM64PackedUnwind()
918   info->PackedInfo |= (RegF & 0x7) << 13;  in tryARM64PackedUnwind()