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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Drvv-vscale.i64.ll3 ; RUN: | FileCheck %s -check-prefixes=RV64,RV64-VLENUNK
7 ; RUN: | FileCheck %s -check-prefixes=RV64,RV64-VLEN256MIN
9 ; RUN: | FileCheck %s -check-prefixes=RV64,RV64-VLEN256MAX
17 ; RV64-NEXT: li a0, 0
18 ; RV64-NEXT: ret
41 ; RV64-NEXT: ret
65 ; RV64-NEXT: ret
90 ; RV64-NEXT: ret
117 ; RV64: # %bb.0:
120 ; RV64-NEXT: ret
[all …]
H A Dfixed-vectors-unaligned.ll88 ; RV64: # %bb.0:
98 ; RV64-NEXT: ret
122 ; RV64-NEXT: ret
169 ; RV64: # %bb.0:
179 ; RV64-NEXT: ret
203 ; RV64-NEXT: ret
290 ; RV64-NEXT: ret
335 ; RV64-NEXT: ret
384 ; RV64-NEXT: ret
405 ; RV64-NEXT: ret
[all …]
H A Dfixed-vectors-bitreverse.ll40 ; RV64: # %bb.0:
47 ; RV64-NEXT: lui a1, 1
54 ; RV64-NEXT: lui a1, 3
61 ; RV64-NEXT: lui a1, 5
68 ; RV64-NEXT: ret
119 ; RV64: # %bb.0:
123 ; RV64-NEXT: lui a1, 16
156 ; RV64-NEXT: ret
250 ; RV64: # %bb.0:
253 ; RV64-NEXT: li a1, 56
[all …]
H A Dfixed-vectors-vpscatter.ll17 ; RV64: # %bb.0:
20 ; RV64-NEXT: ret
35 ; RV64: # %bb.0:
40 ; RV64-NEXT: ret
65 ; RV64-NEXT: ret
94 ; RV64-NEXT: ret
113 ; RV64-NEXT: ret
129 ; RV64-NEXT: ret
149 ; RV64-NEXT: ret
169 ; RV64-NEXT: ret
[all …]
H A Dfixed-vectors-vpgather.ll18 ; RV64: # %bb.0:
22 ; RV64-NEXT: ret
37 ; RV64: # %bb.0:
42 ; RV64-NEXT: ret
63 ; RV64-NEXT: ret
84 ; RV64-NEXT: ret
105 ; RV64-NEXT: ret
126 ; RV64-NEXT: ret
147 ; RV64-NEXT: ret
168 ; RV64-NEXT: ret
[all …]
H A Dbitreverse-sdnode.ll251 ; RV64-NEXT: ret
314 ; RV64-NEXT: ret
377 ; RV64-NEXT: ret
440 ; RV64-NEXT: ret
503 ; RV64-NEXT: ret
566 ; RV64-NEXT: ret
647 ; RV64-NEXT: ret
728 ; RV64-NEXT: ret
809 ; RV64-NEXT: ret
890 ; RV64-NEXT: ret
[all …]
H A Dctpop-sdnode.ll206 ; RV64-NEXT: ret
259 ; RV64-NEXT: ret
312 ; RV64-NEXT: ret
365 ; RV64-NEXT: ret
418 ; RV64-NEXT: ret
471 ; RV64-NEXT: ret
526 ; RV64-NEXT: ret
581 ; RV64-NEXT: ret
636 ; RV64-NEXT: ret
691 ; RV64-NEXT: ret
[all …]
H A Dfixed-vectors-ctpop.ll62 ; LMULMAX2-RV64: # %bb.0:
85 ; LMULMAX2-RV64-NEXT: ret
137 ; LMULMAX1-RV64-NEXT: ret
199 ; LMULMAX2-RV64-NEXT: ret
253 ; LMULMAX1-RV64-NEXT: ret
329 ; LMULMAX2-RV64-NEXT: ret
397 ; LMULMAX1-RV64-NEXT: ret
517 ; LMULMAX2-RV64-NEXT: ret
599 ; LMULMAX1-RV64-NEXT: ret
661 ; LMULMAX2-RV64-NEXT: ret
[all …]
H A Dfixed-vectors-bswap.ll45 ; RV64-LABEL: bswap_v4i32:
46 ; RV64: # %bb.0:
50 ; RV64-NEXT: lui a1, 16
62 ; RV64-NEXT: ret
125 ; RV64-LABEL: bswap_v2i64:
126 ; RV64: # %bb.0:
129 ; RV64-NEXT: li a1, 56
131 ; RV64-NEXT: li a2, 40
133 ; RV64-NEXT: lui a3, 16
141 ; RV64-NEXT: li a3, 255
[all …]
H A Dbswap-sdnode.ll102 ; RV64: # %bb.0:
116 ; RV64-NEXT: ret
141 ; RV64: # %bb.0:
155 ; RV64-NEXT: ret
194 ; RV64-NEXT: ret
233 ; RV64-NEXT: ret
272 ; RV64-NEXT: ret
360 ; RV64-NEXT: ret
448 ; RV64-NEXT: ret
536 ; RV64-NEXT: ret
[all …]
H A Dvpgather-sdnode.ll18 ; RV64: # %bb.0:
22 ; RV64-NEXT: ret
38 ; RV64: # %bb.0:
42 ; RV64-NEXT: ret
62 ; RV64-NEXT: ret
83 ; RV64-NEXT: ret
104 ; RV64-NEXT: ret
125 ; RV64-NEXT: ret
146 ; RV64-NEXT: ret
167 ; RV64-NEXT: ret
[all …]
H A Dvpscatter-sdnode.ll17 ; RV64: # %bb.0:
20 ; RV64-NEXT: ret
35 ; RV64: # %bb.0:
38 ; RV64-NEXT: ret
58 ; RV64-NEXT: ret
83 ; RV64-NEXT: ret
112 ; RV64-NEXT: ret
131 ; RV64-NEXT: ret
147 ; RV64-NEXT: ret
167 ; RV64-NEXT: ret
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Drv64i-exhaustive-w-insts.ll15 ; RV64: # %bb.0:
17 ; RV64-NEXT: ret
26 ; RV64-NEXT: ret
35 ; RV64-NEXT: ret
44 ; RV64-NEXT: ret
53 ; RV64-NEXT: ret
62 ; RV64-NEXT: ret
71 ; RV64-NEXT: ret
80 ; RV64-NEXT: ret
89 ; RV64-NEXT: ret
[all …]
H A Dframe-info.ll16 ; RV64-LABEL: trivial:
17 ; RV64: # %bb.0:
18 ; RV64-NEXT: ret
35 ; RV64-WITHFP-LABEL: trivial:
48 ; RV64-WITHFP-NEXT: ret
74 ; RV64-LABEL: stack_alloc:
89 ; RV64-NEXT: mv sp, a0
95 ; RV64-NEXT: ret
139 ; RV64-WITHFP-NEXT: ret
164 ; RV64: # %bb.0:
[all …]
H A Dselect-constant-xor.ll14 ; RV64-LABEL: xori64i32:
15 ; RV64: # %bb.0:
20 ; RV64-NEXT: ret
37 ; RV64: # %bb.0:
42 ; RV64-NEXT: ret
63 ; RV64-NEXT: ret
84 ; RV64-NEXT: ret
103 ; RV64-NEXT: ret
121 ; RV64-NEXT: ret
138 ; RV64-NEXT: ret
[all …]
H A Delf-preemption.ll30 ; RV64-STATIC-NEXT: ret
33 ; RV64-PIC: # %bb.0:
37 ; RV64-PIC-NEXT: ret
67 ; RV64-PIC-NEXT: ret
97 ; RV64-PIC-NEXT: ret
127 ; RV64-PIC-NEXT: ret
157 ; RV64-PIC-NEXT: ret
186 ; RV64-PIC-NEXT: ret
215 ; RV64-PIC-NEXT: ret
244 ; RV64-PIC-NEXT: ret
[all …]
H A Dshadowcallstack.ll12 ; RV64-LABEL: f1:
13 ; RV64: # %bb.0:
14 ; RV64-NEXT: ret
25 ; RV64-LABEL: f2:
26 ; RV64: # %bb.0:
50 ; RV64-LABEL: f3:
63 ; RV64-NEXT: ret
103 ; RV64-LABEL: f4:
134 ; RV64-NEXT: ret
159 ; RV64-LABEL: f5:
[all …]
H A Dbittest.ll69 ; RV64: # %bb.0:
72 ; RV64-NEXT: ret
88 ; RV64: # %bb.0:
91 ; RV64-NEXT: ret
110 ; RV64-NEXT: ret
163 ; RV64-NEXT: ret
208 ; RV64-NEXT: ret
475 ; RV64-NEXT: ret
501 ; RV64-NEXT: ret
527 ; RV64-NEXT: ret
[all …]
H A Dmachine-cse.ll21 ; RV64: # %bb.0:
28 ; RV64-NEXT: ret
61 ; RV64: # %bb.0:
68 ; RV64-NEXT: ret
103 ; RV64-NEXT: ret
138 ; RV64-NEXT: ret
173 ; RV64-NEXT: ret
206 ; RV64-NEXT: ret
241 ; RV64-NEXT: ret
276 ; RV64-NEXT: ret
[all …]
H A Dtls-models.ll35 ; RV64-PIC-LABEL: f1:
46 ; RV64-PIC-NEXT: ret
57 ; RV64-NOPIC-LABEL: f1:
86 ; RV64-PIC-LABEL: f2:
97 ; RV64-PIC-NEXT: ret
108 ; RV64-NOPIC-LABEL: f2:
133 ; RV64-PIC-LABEL: f3:
140 ; RV64-PIC-NEXT: ret
151 ; RV64-NOPIC-LABEL: f3:
174 ; RV64-PIC-LABEL: f4:
[all …]
H A Dcalling-conv-vector-float.ll8 ; RV64-LABEL: callee_v2f32:
9 ; RV64: # %bb.0:
10 ; RV64-NEXT: fmv.w.x ft0, a2
11 ; RV64-NEXT: fmv.w.x ft1, a0
12 ; RV64-NEXT: fmv.w.x ft2, a3
13 ; RV64-NEXT: fmv.w.x ft3, a1
16 ; RV64-NEXT: fmv.x.w a0, ft0
18 ; RV64-NEXT: ret
30 ; RV64-LABEL: callee_v4f32:
31 ; RV64: # %bb.0:
[all …]
H A Dvec3-setcc-crash.ll48 ; RV64: # %bb.0:
56 ; RV64-NEXT: # %bb.1:
57 ; RV64-NEXT: li a5, 0
59 ; RV64-NEXT: .LBB0_2:
61 ; RV64-NEXT: .LBB0_3:
66 ; RV64-NEXT: # %bb.4:
68 ; RV64-NEXT: .LBB0_5:
72 ; RV64-NEXT: # %bb.6:
75 ; RV64-NEXT: .LBB0_7:
77 ; RV64-NEXT: .LBB0_8:
[all …]
H A Dfastcc-int.ll12 ; RV64-LABEL: callee:
13 ; RV64: # %bb.0:
14 ; RV64-NEXT: ret
53 ; RV64-LABEL: caller:
54 ; RV64: # %bb.0:
58 ; RV64-NEXT: ld t0, 0(a0)
59 ; RV64-NEXT: ld a1, 8(a0)
75 ; RV64-NEXT: sd s0, 8(sp)
76 ; RV64-NEXT: sd t1, 0(sp)
77 ; RV64-NEXT: mv a0, t0
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Demulation-riscv.s47 # RV64: ElfHeader {
48 # RV64-NEXT: Ident {
52 # RV64-NEXT: FileVersion: 1
54 # RV64-NEXT: ABIVersion: 0
56 # RV64-NEXT: }
59 # RV64-NEXT: Version: 1
60 # RV64-NEXT: Entry:
63 # RV64-NEXT: Flags [ (0x0)
64 # RV64-NEXT: ]
65 # RV64-NEXT: HeaderSize: 64
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Delf-header.s26 # RV64: Arch: riscv64
27 # RV64: AddressSize: 64bit
28 # RV64: ElfHeader {
29 # RV64: Ident {
33 # RV64: FileVersion: 1
35 # RV64: ABIVersion: 0
36 # RV64: }
39 # RV64: Version: 1
40 # RV64: Flags [ (0x0)
41 # RV64: ]
[all …]

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