Home
last modified time | relevance | path

Searched refs:RHS2 (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DInstructionCost.h112 InstructionCost RHS2(RHS);
113 *this += RHS2;
129 InstructionCost RHS2(RHS);
130 *this -= RHS2;
152 *this *= RHS2;
164 *this /= RHS2;
211 return *this == RHS2;
224 return *this < RHS2;
229 return *this > RHS2;
234 return *this <= RHS2;
[all …]
/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DSparseBitVector.h241 const SparseBitVectorElement &RHS2, in intersectWithComplement()
247 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; in intersectWithComplement()
689 const SparseBitVector<ElementSize> &RHS2) in intersectWithComplement() argument
692 intersectWithComplement(RHS2); in intersectWithComplement()
694 } else if (this == &RHS2) { in intersectWithComplement()
695 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement()
703 ElementListConstIter Iter2 = RHS2.Elements.begin(); in intersectWithComplement()
711 while (Iter2 != RHS2.Elements.end()) { in intersectWithComplement()
735 const SparseBitVector<ElementSize> *RHS2) { in intersectWithComplement() argument
736 intersectWithComplement(*RHS1, *RHS2); in intersectWithComplement()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dcompare-alloca.ll162 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_inttoptr()
164 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[M1_SUB]], [[RHS2]]
184 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_offset(i8* nonnull [[N2_SUB]])
186 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[M1_SUB]], [[RHS2]]
205 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_inttoptr()
207 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[RHS2]], [[M1_SUB]]
H A Dreduction-or-sext-zext-i1.ll106 ; CHECK-NEXT: [[RHS2:%.*]] = load i64, i64* [[TMP1]], align 8
107 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[LHS1]], [[RHS2]]
151 ; CHECK-NEXT: [[RHS2:%.*]] = load i64, i64* [[TMP1]], align 8
152 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[LHS1]], [[RHS2]]
H A Dreduction-and-sext-zext-i1.ll106 ; CHECK-NEXT: [[RHS2:%.*]] = load i64, i64* [[TMP1]], align 8
107 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[LHS1]], [[RHS2]]
148 ; CHECK-NEXT: [[RHS2:%.*]] = load i64, i64* [[TMP1]], align 8
149 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[LHS1]], [[RHS2]]
H A Dcompare-unescaped.ll248 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_inttoptr()
250 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[M]], [[RHS2]]
268 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_offset(i8* [[N]])
270 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[M]], [[RHS2]]
289 ; CHECK-NEXT: [[RHS2:%.*]] = call i8* @hidden_inttoptr()
291 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8* [[M]], [[RHS2]]
/llvm-project-15.0.7/llvm/unittests/Analysis/
H A DValueTrackingTest.cpp1770 auto *RHS2 = findInstructionByNameOrNull(F, "RHS2"); in TEST_F() local
1771 EXPECT_TRUE(haveNoCommonBitsSet(LHS2, RHS2, DL)); in TEST_F()
1772 EXPECT_TRUE(haveNoCommonBitsSet(RHS2, LHS2, DL)); in TEST_F()
1798 auto *RHS2 = findInstructionByNameOrNull(F, "RHS2"); in TEST_F() local
1799 EXPECT_TRUE(haveNoCommonBitsSet(LHS2, RHS2, DL)); in TEST_F()
1800 EXPECT_TRUE(haveNoCommonBitsSet(RHS2, LHS2, DL)); in TEST_F()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dcond-sel.ll151 ; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]]
152 ; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp2954 Value *LHS2, *RHS2; in visitSelectInst() local
2955 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst()
2957 RHS2, SI, SPF, RHS)) in visitSelectInst()
2959 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst()
2961 RHS2, SI, SPF, LHS)) in visitSelectInst()
H A DInstCombineCompares.cpp2885 Value *LHS2, *RHS2; in matchThreeWayIntCompare() local
2886 if (!match(UnequalVal, m_Select(m_ICmp(PredB, m_Value(LHS2), m_Value(RHS2)), in matchThreeWayIntCompare()
2893 std::swap(LHS2, RHS2); in matchThreeWayIntCompare()
2899 if (PredB == ICmpInst::ICMP_SGT && isa<Constant>(RHS2)) { in matchThreeWayIntCompare()
2903 PredB, cast<Constant>(RHS2)); in matchThreeWayIntCompare()
2908 RHS2 = FlippedStrictness->second; in matchThreeWayIntCompare()
2913 return PredB == ICmpInst::ICMP_SLT && RHS == RHS2; in matchThreeWayIntCompare()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DValueTracking.cpp2986 const Value *LHS2 = nullptr, *RHS2 = nullptr; in isSignedMinMaxClamp() local
2987 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor; in isSignedMinMaxClamp()
2991 if (!match(RHS2, m_APInt(CHigh))) in isSignedMinMaxClamp()
6805 const Value *RHS1, *RHS2; in isImpliedCondition() local
6806 if (match(RHS, m_LogicalOr(m_Value(RHS1), m_Value(RHS2)))) { in isImpliedCondition()
6812 isImpliedCondition(LHS, RHS2, DL, LHSIsTrue, Depth + 1)) in isImpliedCondition()
6816 if (match(RHS, m_LogicalAnd(m_Value(RHS1), m_Value(RHS2)))) { in isImpliedCondition()
6822 isImpliedCondition(LHS, RHS2, DL, LHSIsTrue, Depth + 1)) in isImpliedCondition()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp736 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1, in getAVRCmp() local
749 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); in getAVRCmp()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5639 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
5641 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond()
5643 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5647 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
12005 Register RHS2 = MI.getOperand(4).getReg(); in EmitInstrWithCustomInserter() local
12011 .addReg(LHS2).addReg(RHS2) in EmitInstrWithCustomInserter()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp24151 SDValue RHS1, RHS2; in splitIntVSETCC() local
24152 std::tie(RHS1, RHS2) = splitVector(RHS, DAG, dl); in splitIntVSETCC()
24159 DAG.getNode(ISD::SETCC, dl, HiVT, LHS2, RHS2, CC)); in splitIntVSETCC()