Home
last modified time | relevance | path

Searched refs:RCOrRB (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DCSEInfo.cpp390 if (const RegClassOrRegBank &RCOrRB = MRI.getRegClassOrRegBank(Reg)) { in addNodeIDReg() local
391 if (const auto *RB = RCOrRB.dyn_cast<const RegisterBank *>()) in addNodeIDReg()
393 else if (const auto *RC = RCOrRB.dyn_cast<const TargetRegisterClass *>()) in addNodeIDReg()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h687 const RegClassOrRegBank &RCOrRB){ in setRegClassOrRegBank() argument
688 VRegInfo[Reg].first = RCOrRB; in setRegClassOrRegBank()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp2922 const RegClassOrRegBank &RCOrRB = MRI.getRegClassOrRegBank(MO.getReg()); in getConstrainedRegClassForOperand() local
2923 if (const RegisterBank *RB = RCOrRB.dyn_cast<const RegisterBank*>()) in getConstrainedRegClassForOperand()
2926 if (const auto *RC = RCOrRB.dyn_cast<const TargetRegisterClass *>()) in getConstrainedRegClassForOperand()