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Searched refs:PACK (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/clang/test/Import/builtin-template/
H A Dtest.cpp25 #ifdef PACK in expr()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h204 PACK, enumerator
H A DSystemZISelLowering.cpp2999 SDValue Res = DAG.getNode(SystemZISD::PACK, DL, VT, HRes, LRes); in getVectorCmp()
3009 return DAG.getNode(SystemZISD::PACK, DL, VT, HRes, LRes); in getVectorCmp()
4562 { SystemZISD::PACK, 4,
4565 { SystemZISD::PACK, 2,
4568 { SystemZISD::PACK, 1,
4765 P.Opcode == SystemZISD::PACK ? P.Operand * 2 : in getPermuteNode()
4776 } else if (P.Opcode == SystemZISD::PACK) { in getPermuteNode()
4779 Op = DAG.getNode(SystemZISD::PACK, DL, OutVT, Op0, Op1); in getPermuteNode()
5963 OPCODE(PACK); in getTargetNodeName()
H A DSystemZOperators.td312 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
H A DSystemZScheduleZ196.td619 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZScheduleZEC12.td632 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZScheduleZ13.td662 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZScheduleZ16.td696 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZScheduleZ15.td696 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZScheduleZ14.td682 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
H A DSystemZInstrInfo.td1999 def PACK : SideEffectBinarySSb<"pack", 0xF2>;
/llvm-project-15.0.7/flang/lib/Evaluate/
H A Dfold-implementation.h67 Expr<T> PACK(FunctionRef<T> &&);
784 template <typename T> Expr<T> Folder<T>::PACK(FunctionRef<T> &&funcRef) { in PACK() function
1128 return Folder<T>{context}.PACK(std::move(funcRef)); in FoldOperation()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZb.td574 def PACK : ALU_rr<0b0000100, 0b100, "pack">,
1061 (PACK GPR:$rs1, GPR:$rs2)>;
1065 (PACK GPR:$rs1, GPR:$rs2)>;
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SchedIceLake.td676 "(V?)PACK(U|S)S(DW|WB)(Y|Z|Z128|Z256)?rr",
1330 "(V?)PACK(U|S)S(DW|WB)(Z128)?rm",
1573 "(V?)PACK(U|S)S(DW|WB)(Y|Z|Z256)rm",