Searched refs:OutCC (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 302 MachineInstr *emitConjunction(Register Val, AArch64CC::CondCode &OutCC, 307 AArch64CC::CondCode OutCC, 309 MachineInstr *emitConjunctionRec(Register Val, AArch64CC::CondCode &OutCC, 4817 AArch64CC::CondCode Predicate, AArch64CC::CondCode OutCC, in emitConditionalComparison() argument 4841 AArch64CC::CondCode InvOutCC = AArch64CC::getInvertedCondCode(OutCC); in emitConditionalComparison() 4850 Register Val, AArch64CC::CondCode &OutCC, bool Negate, Register CCOp, in emitConjunctionRec() argument 4863 OutCC = changeICMPPredToAArch64CC(CC); in emitConjunctionRec() 4867 changeFPCCToANDAArch64CC(CC, OutCC, ExtraCC); in emitConjunctionRec() 4891 return emitConditionalComparison(LHS, RHS, CC, Predicate, OutCC, MIB); in emitConjunctionRec() 4957 LHS, OutCC, NegateL, CmpR->getOperand(0).getReg(), RHSCC, MIB); in emitConjunctionRec() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2993 AArch64CC::CondCode OutCC, in emitConditionalComparison() argument 3017 AArch64CC::CondCode InvOutCC = AArch64CC::getInvertedCondCode(OutCC); in emitConditionalComparison() 3100 AArch64CC::CondCode &OutCC, bool Negate, SDValue CCOp, in emitConjunctionRec() argument 3114 OutCC = changeIntCCToAArch64CC(CC); in emitConjunctionRec() 3118 changeFPCCToANDAArch64CC(CC, OutCC, ExtraCC); in emitConjunctionRec() 3137 return emitConditionalComparison(LHS, RHS, CC, CCOp, Predicate, OutCC, DL, in emitConjunctionRec() 3201 SDValue CmpL = emitConjunctionRec(DAG, LHS, OutCC, NegateL, CmpR, RHSCC); in emitConjunctionRec() 3203 OutCC = AArch64CC::getInvertedCondCode(OutCC); in emitConjunctionRec() 3212 AArch64CC::CondCode &OutCC) { in emitConjunction() argument 3218 return emitConjunctionRec(DAG, Val, OutCC, false, SDValue(), AArch64CC::AL); in emitConjunction()
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