| /llvm-project-15.0.7/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 418 if (OperandIdx >= MaxOperands) in getOperandAsUnsigned()
421 OperandIdx); in getOperandAsUnsigned()
423 uint64_t Operand = Ops[OperandIdx]; in getOperandAsUnsigned()
439 OperandIdx); in getOperandAsUnsigned()
453 OperandIdx); in getOperandAsUnsigned()
463 if (OperandIdx >= MaxOperands) in getOperandAsSigned()
466 OperandIdx); in getOperandAsSigned()
468 uint64_t Operand = Ops[OperandIdx]; in getOperandAsSigned()
484 OperandIdx, CFIProgram::operandTypeString(Type)); in getOperandAsSigned()
507 OperandIdx); in getOperandAsSigned()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600Packetizer.cpp | 81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector() local
82 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0) in getPreviousVector()
131 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV() local
132 if (OperandIdx < 0) in substitutePV()
134 Register Src = MI.getOperand(OperandIdx).getReg(); in substitutePV()
137 MI.getOperand(OperandIdx).setReg(It->second); in substitutePV()
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| H A D | R600ISelLowering.cpp | 2070 int OperandIdx[] = { in PostISelFolding() local
2101 if (OperandIdx[i] < 0) in PostISelFolding()
2103 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding()
2107 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding()
2123 int OperandIdx[] = { in PostISelFolding() local
2139 if (OperandIdx[i] < 0) in PostISelFolding()
2141 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding()
2146 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 167 int getOperandCycle(unsigned ItinClassIndx, unsigned OperandIdx) const { in getOperandCycle() argument
173 if ((FirstIdx + OperandIdx) >= LastIdx) in getOperandCycle()
176 return (int)OperandCycles[FirstIdx + OperandIdx]; in getOperandCycle()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | CanonicalizeFreezeInLoops.cpp | 185 unsigned OperandIdx = in run() local
187 InsertFreezeAndForgetFromSCEV(PHI->getOperandUse(OperandIdx)); in run()
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| H A D | ScalarEvolutionExpander.cpp | 2281 WorkItem.ParentOpcode, WorkItem.OperandIdx, Imm, Ty, CostKind); in isHighCostExpansionHelper()
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| /llvm-project-15.0.7/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 422 uint32_t OperandIdx) const;
425 uint32_t OperandIdx) const;
525 const Instruction &Instr, unsigned OperandIdx,
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| /llvm-project-15.0.7/llvm/include/llvm/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.h | 35 ParentOpcode(Opc), OperandIdx(Idx), S(S) { } in SCEVOperand()
39 int OperandIdx; member
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineFunction.cpp | 1224 unsigned OperandIdx = 0; in finalizeDebugInstrRefs() local
1228 ++OperandIdx; in finalizeDebugInstrRefs()
1230 assert(OperandIdx < DefMI.getNumOperands()); in finalizeDebugInstrRefs()
1235 MI.getOperand(1).setImm(OperandIdx); in finalizeDebugInstrRefs()
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| H A D | CodeGenPrepare.cpp | 7331 unsigned OperandIdx) { in canCauseUndefinedBehavior() argument
7334 if (OperandIdx != 1) in canCauseUndefinedBehavior()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 849 unsigned OperandIdx = 0; in EmitDbgInstrRef() local
853 ++OperandIdx; in EmitDbgInstrRef()
855 assert(OperandIdx < DefMI->getNumOperands()); in EmitDbgInstrRef()
860 MIB.addImm(OperandIdx); in EmitDbgInstrRef()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 1271 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument
1272 Value *InVal = BdvIE->getOperand(OperandIdx); in findBasePointer()
1274 BaseIE->setOperand(OperandIdx, Base); in findBasePointer()
1281 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument
1282 Value *InVal = BdvSV->getOperand(OperandIdx); in findBasePointer()
1284 BaseSV->setOperand(OperandIdx, Base); in findBasePointer()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6337 unsigned OperandIdx[4]; in cvtExp() local
6347 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
6355 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
6378 Inst.getOperand(OperandIdx[1]) = Inst.getOperand(OperandIdx[2]); in cvtExp()
6379 Inst.getOperand(OperandIdx[2]).setReg(AMDGPU::NoRegister); in cvtExp()
6380 Inst.getOperand(OperandIdx[3]).setReg(AMDGPU::NoRegister); in cvtExp()
6384 if (Inst.getOperand(OperandIdx[i]).getReg() != AMDGPU::NoRegister) { in cvtExp()
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