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Searched refs:OpSel (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNDPPCombine.cpp349 auto OpSel = OpSelOpr->getImm(); in createDPPInst() local
350 if (OpSel != 0) { in createDPPInst()
356 DPPInst.addImm(OpSel); in createDPPInst()
H A DAMDGPUInstructionSelector.h153 bool OpSel = false, bool ForceVGPR = false) const;
H A DAMDGPUISelDAGToDAG.h226 bool OpSel) const;
H A DSIDefines.h888 enum OpSel : uint64_t { enum
H A DVOPInstructions.td1202 class VOP3Features<bit Clamp, bit OpSel, bit Packed, bit MAI> {
1204 bit HasOpSel = OpSel;
H A DAMDGPUISelDAGToDAG.cpp2644 bool OpSel) const { in SelectVINTERPModsImpl()
2647 if (OpSel) in SelectVINTERPModsImpl()
H A DSIInstrInfo.td1264 def op_sel0 : NamedOperandU32Default0<"OpSel", NamedMatchClass<"OpSel">>;
H A DAMDGPUInstructionSelector.cpp3581 MachineOperand &Root, bool AllowAbs, bool OpSel, bool ForceVGPR) const { in selectVOP3ModsImpl() argument
3598 if (OpSel) in selectVOP3ModsImpl()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp753 unsigned OpSel = 0; member
776 Modifiers.OpSel |= !!(Val & SISrcMods::OP_SEL_0) << J; in collectVOPModifiers()
782 Modifiers.OpSel |= !!(Val & SISrcMods::DST_OP_SEL) << 3; in collectVOPModifiers()
802 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertDPP8Inst()
825 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertVOP3DPPInst()
983 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertVOP3PDPPInst()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4166 unsigned OpSel = Inst.getOperand(OpSelIdx).getImm(); in validateOpSel() local
4168 if (OpSel & ~3) in validateOpSel()
4192 if (OpSel & 3) in validateOpSel()
8047 unsigned OpSel = Inst.getOperand(OpSelIdx).getImm(); in cvtVOP3DstOpSelOnly() local
8049 if ((OpSel & (1 << SrcNum)) != 0) { in cvtVOP3DstOpSelOnly()
8158 unsigned OpSel = Inst.getOperand(OpSelIdx).getImm(); in cvtVINTERP() local
8168 if ((OpSel & (1 << J)) != 0) in cvtVINTERP()
8171 (OpSel & (1 << 3)) != 0) in cvtVINTERP()
8300 unsigned OpSel = 0; in cvtVOP3P() local
8306 OpSel = Inst.getOperand(OpSelIdx).getImm(); in cvtVOP3P()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Ddagcombine-select.ll243 ; TODO: it shall be possible to fold constants with OpSel