| /llvm-project-15.0.7/bolt/test/X86/ |
| H A D | cfi-instrs-count.s | 13 # CHECK: 1: OpOffset
15 # CHECK: 3: OpOffset
16 # CHECK: 4: OpOffset
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| H A D | shrinkwrapping-insertcfi.s | 27 # !CFI OpOffset for reg3/rbx is inserted into this block.
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| H A D | cfi-instrs-reordered.s | 14 # CHECK: !CFI $1 ; OpOffset
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCDwarf.h | 484 OpOffset, enumerator
572 return MCCFIInstruction(OpOffset, L, Register, Offset, ""); in createOffset()
645 assert(Operation == OpDefCfa || Operation == OpOffset || in getRegister()
664 assert(Operation == OpDefCfa || Operation == OpOffset || in getOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AsmBackend.cpp | 599 if (LRPush.getOperation() != MCCFIInstruction::OpOffset) in generateCompactUnwindEncoding()
602 if (FPPush.getOperation() != MCCFIInstruction::OpOffset) in generateCompactUnwindEncoding()
629 case MCCFIInstruction::OpOffset: { in generateCompactUnwindEncoding()
641 if (Inst2.getOperation() != MCCFIInstruction::OpOffset) in generateCompactUnwindEncoding()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemProfiler.cpp | 364 unsigned OpOffset = 0; in isInterestingMemoryAccess() local
369 OpOffset = 1; in isInterestingMemoryAccess()
379 auto *BasePtr = CI->getOperand(0 + OpOffset); in isInterestingMemoryAccess()
380 Access.MaybeMask = CI->getOperand(2 + OpOffset); in isInterestingMemoryAccess()
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| H A D | AddressSanitizer.cpp | 1302 unsigned OpOffset = IsWrite ? 1 : 0; in getInterestingMemoryOperands() local
1306 auto BasePtr = CI->getOperand(OpOffset); in getInterestingMemoryOperands()
1312 if (auto *Op = dyn_cast<ConstantInt>(CI->getOperand(1 + OpOffset))) in getInterestingMemoryOperands()
1314 Value *Mask = CI->getOperand(2 + OpOffset); in getInterestingMemoryOperands()
1315 Interesting.emplace_back(I, OpOffset, IsWrite, Ty, Alignment, Mask); in getInterestingMemoryOperands()
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| /llvm-project-15.0.7/bolt/lib/Utils/ |
| H A D | Utils.cpp | 100 case MCCFIInstruction::OpOffset: in operator ==()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 4430 int OpOffset = 0; in legalizeBufferStore() local
4433 OpOffset = 1; in legalizeBufferStore()
4443 Format = MI.getOperand(5 + OpOffset).getImm(); in legalizeBufferStore()
4444 ++OpOffset; in legalizeBufferStore()
4511 int OpOffset = 0; in legalizeBufferLoad() local
4514 OpOffset = 1; in legalizeBufferLoad()
4525 ++OpOffset; in legalizeBufferLoad()
4688 int OpOffset = 0; in legalizeBufferAtomic() local
4693 OpOffset = -1; in legalizeBufferAtomic()
4701 ++OpOffset; in legalizeBufferAtomic()
[all …]
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| H A D | AMDGPUInstructionSelector.cpp | 3152 int OpOffset = 0; in selectBufferLoadLds() local
3155 OpOffset = 1; in selectBufferLoadLds()
3158 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in selectBufferLoadLds()
3209 MIB.add(MI.getOperand(5 + OpOffset)); // soffset in selectBufferLoadLds()
3210 MIB.add(MI.getOperand(6 + OpOffset)); // imm offset in selectBufferLoadLds()
3211 unsigned Aux = MI.getOperand(7 + OpOffset).getImm(); in selectBufferLoadLds()
3217 LoadPtrI.Offset = MI.getOperand(6 + OpOffset).getImm(); in selectBufferLoadLds()
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| H A D | SIISelLowering.cpp | 8231 unsigned OpOffset = HasVIndex ? 1 : 0; in LowerINTRINSIC_VOID() local
8232 SDValue VOffset = Op.getOperand(5 + OpOffset); in LowerINTRINSIC_VOID()
8274 Ops.push_back(Op.getOperand(6 + OpOffset)); // soffset in LowerINTRINSIC_VOID()
8275 Ops.push_back(Op.getOperand(7 + OpOffset)); // imm offset in LowerINTRINSIC_VOID()
8276 unsigned Aux = Op.getConstantOperandVal(8 + OpOffset); in LowerINTRINSIC_VOID()
8287 LoadPtrI.Offset = Op->getConstantOperandVal(7 + OpOffset); in LowerINTRINSIC_VOID()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 458 unsigned OpOffset = in selectLoad() local
460 Register Ptr = I.getOperand(1 + OpOffset).getReg(); in selectLoad()
467 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB); in selectLoad()
475 unsigned OpOffset = in selectStore() local
477 Register StoreVal = I.getOperand(0 + OpOffset).getReg(); in selectStore()
478 Register Ptr = I.getOperand(1 + OpOffset).getReg(); in selectStore()
485 addMemoryOperands(I.getOperand(2 + OpOffset).getImm(), MIB); in selectStore()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AsmPrinterDwarf.cpp | 248 case MCCFIInstruction::OpOffset: in emitCFIInstruction()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CFIInstrInserter.cpp | 208 case MCCFIInstruction::OpOffset: in calculateOutgoingCFAInfo()
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| H A D | MachineOperand.cpp | 633 case MCCFIInstruction::OpOffset: in printCFI()
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| /llvm-project-15.0.7/llvm/lib/DWARFLinker/ |
| H A D | DWARFLinker.cpp | 981 uint64_t OpOffset = 0; in cloneExpression() local
995 assert(OpOffset < Op.getEndOffset()); in cloneExpression()
996 uint32_t ULEBsize = Op.getEndOffset() - OpOffset - 1; in cloneExpression()
1034 StringRef Bytes = Data.getData().slice(OpOffset, Op.getEndOffset()); in cloneExpression()
1037 OpOffset = Op.getEndOffset(); in cloneExpression()
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| /llvm-project-15.0.7/bolt/lib/Passes/ |
| H A D | RegReAssign.cpp | 101 case MCCFIInstruction::OpOffset: in swap()
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| H A D | ShrinkWrapping.cpp | 399 case MCCFIInstruction::OpOffset: in classifyCFIs()
1722 case MCCFIInstruction::OpOffset: in updateCFIInstOffset()
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| /llvm-project-15.0.7/bolt/lib/Core/ |
| H A D | BinaryFunction.cpp | 704 case MCCFIInstruction::OpOffset: in mutateCFIRegisterFor()
748 case MCCFIInstruction::OpOffset: in mutateCFIOffsetFor()
2412 case MCCFIInstruction::OpOffset: in update()
2527 case MCCFIInstruction::OpOffset: in isRedundant()
2674 case MCCFIInstruction::OpOffset: in unwindCFIState()
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| H A D | BinaryEmitter.cpp | 829 case MCCFIInstruction::OpOffset: in emitCFIInstruction()
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| H A D | BinaryContext.cpp | 1728 case MCCFIInstruction::OpOffset: in printCFI()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.cpp | 1139 case MCCFIInstruction::OpOffset: // DW_CFA_offset in generateCompactUnwindEncoding()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 1422 case MCCFIInstruction::OpOffset: { in generateCompactUnwindEncoding()
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| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCDwarf.cpp | 1403 case MCCFIInstruction::OpOffset: in emitCFIInstruction()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 2208 unsigned OpOffset = IsStrict ? 1 : 0; in PromoteIntOp_FPOWI() local
2211 N->getOperand(1 + OpOffset).getValueType().getSizeInBits() && in PromoteIntOp_FPOWI()
2215 SDValue Ops[2] = {N->getOperand(0 + OpOffset), N->getOperand(1 + OpOffset)}; in PromoteIntOp_FPOWI()
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