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Searched refs:Op0Reg (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3604 if (!Op0Reg) in fastLowerIntrinsicCall()
4117 Op0Reg = emitAnd_ri(MVT::i32, Op0Reg, Mask); in emitLSR_rr()
4233 Op0Reg = emitIntExt(RetVT, Op0Reg, MVT::i32, /*isZExt=*/false); in emitASR_rr()
4676 Register Op0Reg = getRegForValue(Op0); in selectShift() local
4677 if (!Op0Reg) in selectShift()
4699 Register Op0Reg = getRegForValue(I->getOperand(0)); in selectShift() local
4700 if (!Op0Reg) in selectShift()
4711 ResultReg = emitLSL_rr(RetVT, Op0Reg, Op1Reg); in selectShift()
4714 ResultReg = emitASR_rr(RetVT, Op0Reg, Op1Reg); in selectShift()
4717 ResultReg = emitLSR_rr(RetVT, Op0Reg, Op1Reg); in selectShift()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1965 Register Op0Reg = getRegForValue(Op0); in selectShift() local
1966 if (!Op0Reg) in selectShift()
1977 if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt)) in selectShift()
1980 Op0Reg = TempReg; in selectShift()
2000 emitInst(Opcode, ResultReg).addReg(Op0Reg).addImm(ShiftVal); in selectShift()
2023 emitInst(Opcode, ResultReg).addReg(Op0Reg).addReg(Op1Reg); in selectShift()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastISel.cpp1409 Register Op0Reg = getRegForValue(Op0); in X86FastEmitCompare() local
1410 if (Op0Reg == 0) return false; in X86FastEmitCompare()
1422 .addReg(Op0Reg) in X86FastEmitCompare()
1434 .addReg(Op0Reg) in X86FastEmitCompare()
1840 Register Op0Reg = getRegForValue(I->getOperand(0)); in X86SelectShift() local
1841 if (Op0Reg == 0) return false; in X86SelectShift()
1857 .addReg(Op0Reg); in X86SelectShift()
1949 Register Op0Reg = getRegForValue(I->getOperand(0)); in X86SelectDivRem() local
1950 if (Op0Reg == 0) in X86SelectDivRem()
1958 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()
H A DX86InstructionSelector.cpp1043 const Register Op0Reg = I.getOperand(2).getReg(); in selectUadde() local
1081 .addReg(Op0Reg) in selectUadde()