256   unsigned emitLSL_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
257   unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, uint64_t Imm,
259   unsigned emitLSR_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
260   unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, uint64_t Imm,
262   unsigned emitASR_rr(MVT RetVT, unsigned Op0Reg, unsigned Op1Reg);
263   unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, uint64_t Imm,
3603     Register Op0Reg = getRegForValue(II->getOperand(0));  in fastLowerIntrinsicCall()  local
3604     if (!Op0Reg)  in fastLowerIntrinsicCall()
3607     unsigned ResultReg = fastEmit_r(VT, VT, ISD::FSQRT, Op0Reg);  in fastLowerIntrinsicCall()
3999 unsigned AArch64FastISel::emitLSL_rr(MVT RetVT, unsigned Op0Reg,  in emitLSL_rr()  argument
4017   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitLSL_rr()
4101 unsigned AArch64FastISel::emitLSR_rr(MVT RetVT, unsigned Op0Reg,  in emitLSR_rr()  argument
4117     Op0Reg = emitAnd_ri(MVT::i32, Op0Reg, Mask);  in emitLSR_rr()
4120   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitLSR_rr()
4217 unsigned AArch64FastISel::emitASR_rr(MVT RetVT, unsigned Op0Reg,  in emitASR_rr()  argument
4233     Op0Reg = emitIntExt(RetVT, Op0Reg, MVT::i32, /*isZExt=*/false);  in emitASR_rr()
4236   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitASR_rr()
4676     Register Op0Reg = getRegForValue(Op0);  in selectShift()  local
4677     if (!Op0Reg)  in selectShift()
4683       ResultReg = emitLSL_ri(RetVT, SrcVT, Op0Reg, ShiftVal, IsZExt);  in selectShift()
4686       ResultReg = emitASR_ri(RetVT, SrcVT, Op0Reg, ShiftVal, IsZExt);  in selectShift()
4689       ResultReg = emitLSR_ri(RetVT, SrcVT, Op0Reg, ShiftVal, IsZExt);  in selectShift()
4699   Register Op0Reg = getRegForValue(I->getOperand(0));  in selectShift()  local
4700   if (!Op0Reg)  in selectShift()
4711     ResultReg = emitLSL_rr(RetVT, Op0Reg, Op1Reg);  in selectShift()
4714     ResultReg = emitASR_rr(RetVT, Op0Reg, Op1Reg);  in selectShift()
4717     ResultReg = emitLSR_rr(RetVT, Op0Reg, Op1Reg);  in selectShift()
4756   Register Op0Reg = getRegForValue(I->getOperand(0));  in selectBitCast()  local
4757   if (!Op0Reg)  in selectBitCast()
4760   Register ResultReg = fastEmitInst_r(Opc, RC, Op0Reg);  in selectBitCast()