| /llvm-project-15.0.7/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 227 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument 229 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset() 230 if (OffsetOp.isImm()) { in printMemoryImmediateOffset() 232 OS << OffsetOp.getImm(); in printMemoryImmediateOffset() 234 OffsetOp.getExpr()->print(OS, &MAI); in printMemoryImmediateOffset() 241 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local 246 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand() 256 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local 269 OS << "%" << getRegisterName(OffsetOp.getReg()); in printMemRrOperand() 277 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemSplsOperand() local [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 178 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local 184 if (OffsetOp.isImm()) { in printMemri() 185 int64_t Offset = OffsetOp.getImm(); in printMemri() 191 } else if (OffsetOp.isExpr()) { in printMemri() 192 O << *OffsetOp.getExpr(); in printMemri()
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| H A D | AVRMCCodeEmitter.cpp | 141 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local 160 if (OffsetOp.isImm()) { in encodeMemri() 161 OffsetBits = OffsetOp.getImm(); in encodeMemri() 162 } else if (OffsetOp.isExpr()) { in encodeMemri() 164 Fixups.push_back(MCFixup::create(0, OffsetOp.getExpr(), in encodeMemri()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 69 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local 76 if (OffsetOp.isImm()) { in printMemOperand() 77 auto Imm = OffsetOp.getImm(); in printMemOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local 126 OffsetOp) in eliminateFrameIndex() 133 .addReg(OffsetOp); in eliminateFrameIndex()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 164 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local 165 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl() 435 MachineOperand OffsetOp = MI->getOperand(getOffsetOpPosition(MI)); in processAddUses() local 436 if (!OffsetOp.isImm()) in processAddUses() 439 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses() 497 MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI)); in updateAddUses() local 501 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
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| H A D | HexagonInstrInfo.cpp | 2041 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local 2042 if (OffsetOp.isImm()) { in getIncrementValue() 2043 Value = OffsetOp.getImm(); in getIncrementValue() 3271 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local 3272 if (!OffsetOp.isImm()) in getBaseAndOffset() 3274 Offset = OffsetOp.getImm(); in getBaseAndOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 879 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local 880 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex() 890 OffsetOp->setImm(NewOffset); in resolveFrameIndex() 903 OffsetOp->setImm(NewOffset); in resolveFrameIndex() 2134 MachineOperand *OffsetOp = in eliminateFrameIndex() local 2136 int64_t NewOffset = Offset + OffsetOp->getImm(); in eliminateFrameIndex() 2139 OffsetOp->setImm(NewOffset); in eliminateFrameIndex()
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| H A D | SIInstrInfo.cpp | 306 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local 311 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth() 312 if (OffsetOp) { in getMemOperandsWithOffsetWidth() 320 Offset = OffsetOp->getImm(); in getMemOperandsWithOffsetWidth() 423 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth() 424 Offset = OffsetOp ? OffsetOp->getImm() : 0; in getMemOperandsWithOffsetWidth()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1369 const MachineOperand &OffsetOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local 1370 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction() 1380 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction() 1391 const MachineOperand &OffsetOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local 1392 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction() 1403 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3687 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local 3717 if (OffsetOp.isImm()) { in expandMem16Inst() 3718 int64_t LoOffset = OffsetOp.getImm() & 0xffff; in expandMem16Inst() 3719 int64_t HiOffset = OffsetOp.getImm() & ~0xffff; in expandMem16Inst() 3729 bool Is32BitImm = isInt<32>(OffsetOp.getImm()); in expandMem16Inst() 3742 if (OffsetOp.isExpr()) { in expandMem16Inst() 3769 const MCExpr *OffExpr = OffsetOp.getExpr(); in expandMem16Inst() 3814 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local 3845 if (OffsetOp.isImm()) { in expandMem9Inst() 3852 if (OffsetOp.isExpr()) { in expandMem9Inst() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1976 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local 1980 if (OffsetOp.getImm() == 0 && AfterCSRPopSize >= 0) { in emitEpilogue()
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| H A D | AArch64ISelDAGToDAG.cpp | 1451 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local 1452 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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| H A D | AArch64ISelLowering.cpp | 17679 SDValue OffsetOp = Add.getOperand(1); in foldIndexIntoBase() local 17681 if (auto Offset = DAG.getSplatValue(OffsetOp)) { in foldIndexIntoBase()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 7741 SDValue OffsetOp) { in InferPointerInfo() argument 7743 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo() 7745 if (OffsetOp.isUndef()) in InferPointerInfo()
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