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Searched refs:OffsetIdx (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FalkorHWPFFix.cpp240 int OffsetIdx; in getLoadInfo() local
251 OffsetIdx = -1; in getLoadInfo()
271 OffsetIdx = -1; in getLoadInfo()
376 OffsetIdx = 5; in getLoadInfo()
396 OffsetIdx = 5; in getLoadInfo()
418 OffsetIdx = 3; in getLoadInfo()
493 OffsetIdx = 3; in getLoadInfo()
561 OffsetIdx = 2; in getLoadInfo()
595 OffsetIdx = 3; in getLoadInfo()
607 OffsetIdx = 3; in getLoadInfo()
[all …]
H A DAArch64FrameLowering.cpp1264 unsigned OffsetIdx = MI.getNumExplicitOperands() - 1; in fixupCalleeSaveRestoreStackOffset() local
1265 assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP && in fixupCalleeSaveRestoreStackOffset()
1268 MachineOperand &OffsetOpnd = MI.getOperand(OffsetIdx); in fixupCalleeSaveRestoreStackOffset()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstCombineIntrinsic.cpp1115 unsigned OffsetIdx; in simplifyAMDGCNMemoryIntrinsicDemanded() local
1118 OffsetIdx = 1; in simplifyAMDGCNMemoryIntrinsicDemanded()
1125 OffsetIdx = InvalidOffsetIdx; in simplifyAMDGCNMemoryIntrinsicDemanded()
1127 OffsetIdx = 1; in simplifyAMDGCNMemoryIntrinsicDemanded()
1130 OffsetIdx = 2; in simplifyAMDGCNMemoryIntrinsicDemanded()
1134 OffsetIdx = InvalidOffsetIdx; in simplifyAMDGCNMemoryIntrinsicDemanded()
1138 if (OffsetIdx != InvalidOffsetIdx) { in simplifyAMDGCNMemoryIntrinsicDemanded()
1141 auto *Offset = II.getArgOperand(OffsetIdx); in simplifyAMDGCNMemoryIntrinsicDemanded()
1147 Args[OffsetIdx] = IC.Builder.CreateAdd(Offset, OffsetAddVal); in simplifyAMDGCNMemoryIntrinsicDemanded()
H A DSILoadStoreOptimizer.cpp676 int OffsetIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::offset); in setMI() local
677 Offset = I->getOperand(OffsetIdx).getImm(); in setMI()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Ddebug-value2.ll340 !55 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "OffsetIdx", file: !4, line: 1316, size:…
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp16383 unsigned OffsetIdx = 1; in CombineToPreIndexedLoadStore() local
16384 if (OtherUses[i]->getOperand(OffsetIdx).getNode() == BasePtr.getNode()) in CombineToPreIndexedLoadStore()
16385 OffsetIdx = 0; in CombineToPreIndexedLoadStore()
16386 assert(OtherUses[i]->getOperand(!OffsetIdx).getNode() == in CombineToPreIndexedLoadStore()
16400 auto *CN = cast<ConstantSDNode>(OtherUses[i]->getOperand(OffsetIdx)); in CombineToPreIndexedLoadStore()
16403 int X0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 1) ? -1 : 1; in CombineToPreIndexedLoadStore()
16404 int Y0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 0) ? -1 : 1; in CombineToPreIndexedLoadStore()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp2711 auto OffsetIdx = B.buildAnd(IdxTy, Idx, OffsetMask); in getBitcastWiderVectorElementOffset() local
2712 return B.buildShl(IdxTy, OffsetIdx, in getBitcastWiderVectorElementOffset()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp14362 if (const int OffsetIdx = BroadcastIdx % Scale) in lowerShuffleAsTruncBroadcast() local
14364 DAG.getConstant(OffsetIdx * EltSize, DL, MVT::i8)); in lowerShuffleAsTruncBroadcast()