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/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Datomic-unordered.ll13 ; CHECK-O3-LABEL: load_i8:
14 ; CHECK-O3: # %bb.0:
16 ; CHECK-O3-NEXT: retq
29 ; CHECK-O3: # %bb.0:
31 ; CHECK-O3-NEXT: retq
43 ; CHECK-O3: # %bb.0:
45 ; CHECK-O3-NEXT: retq
61 ; CHECK-O3-NEXT: retq
120 ; CHECK-O3-NEXT: retq
142 ; CHECK-O3-NEXT: retq
[all …]
H A Dx86-no_callee_saved_registers.ll3 ; RUN: llc -mtriple=x86_64-unknown-unknown -O3 < %s | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
174 ; CHECK-O3-LABEL: test3:
196 ; CHECK-O3-NEXT: .Ltmp0:
198 ; CHECK-O3-NEXT: .Ltmp1:
204 ; CHECK-O3-NEXT: popq %rbx
206 ; CHECK-O3-NEXT: popq %r12
208 ; CHECK-O3-NEXT: popq %r13
210 ; CHECK-O3-NEXT: popq %r14
212 ; CHECK-O3-NEXT: popq %r15
216 ; CHECK-O3-NEXT: retq
[all …]
H A Datomic-monotonic.ll11 ; CHECK-O3-LABEL: load_i8:
12 ; CHECK-O3: # %bb.0:
14 ; CHECK-O3-NEXT: retq
26 ; CHECK-O3-LABEL: store_i8:
27 ; CHECK-O3: # %bb.0:
29 ; CHECK-O3-NEXT: retq
40 ; CHECK-O3-LABEL: load_i16:
41 ; CHECK-O3: # %bb.0:
43 ; CHECK-O3-NEXT: retq
57 ; CHECK-O3: # %bb.0:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Dlpmx.ll43 ; CHECK-O3-LABEL: foo0:
51 ; CHECK-O3-NEXT: cli
57 ; CHECK-O3-NEXT: lsl r24
58 ; CHECK-O3-NEXT: rol r25
66 ; CHECK-O3-NEXT: cli
70 ; CHECK-O3-NEXT: pop r29
72 ; CHECK-O3-NEXT: ret
112 ; CHECK-O3-LABEL: foo1:
120 ; CHECK-O3-NEXT: cli
132 ; CHECK-O3-NEXT: cli
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dwwm-reserved-spill.ll63 ; GFX9-O3: ; %bb.0:
318 ; GFX9-O3: ; %bb.0:
383 ; GFX9-O3: ; %bb.0:
492 ; GFX9-O3: ; %bb.0:
620 ; GFX9-O3: ; %bb.0:
669 ; GFX9-O3-NEXT: s_nop 0
671 ; GFX9-O3-NEXT: s_nop 0
673 ; GFX9-O3-NEXT: s_nop 0
676 ; GFX9-O3-NEXT: s_nop 0
678 ; GFX9-O3-NEXT: s_nop 0
[all …]
H A Dllc-pipeline.ll987 ; GCN-O3:Target Library Information
992 ; GCN-O3-NEXT:Profile summary info
1002 ; GCN-O3-NEXT: ModulePass Manager
1023 ; GCN-O3-NEXT: SROA
1026 ; GCN-O3-NEXT: Memory SSA
1029 ; GCN-O3-NEXT: LCSSA Verifier
1047 ; GCN-O3-NEXT: Early CSE
1087 ; GCN-O3-NEXT: AMDGPU Attributor
1117 ; GCN-O3-NEXT: Code sinking
1136 ; GCN-O3-NEXT: Memory SSA
[all …]
H A Dllvm.amdgcn.wavefrontsize.ll7 ; RUN: opt -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
8 ; RUN: opt -mtriple=amdgcn-- -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-WXX %s
9 ; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize32 -S < %s | FileCheck -check-prefixes=OPT,OP…
10 ; RUN: opt -mtriple=amdgcn-- -passes='default<O3>' -mattr=+wavefrontsize32 -S < %s | FileCheck -che…
11 ; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize64 -S < %s | FileCheck -check-prefixes=OPT,OP…
12 ; RUN: opt -mtriple=amdgcn-- -mcpu=tonga -O3 -S < %s | FileCheck -check-prefixes=OPT,OPT-W64 %s
13 ; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | F…
14 ; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | F…
15 ; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1100 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | F…
16 ; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1100 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | F…
H A Dwwm-reserved.ll94 ; GFX9-O3: v_add_u32_e32 v1, v0, v0
99 ; GFX9-O3: v_sub_u32_e32 v0, v0, v1
111 ; GFX9-O3: v_mov_b32_e32 v2, [[ARG]]
115 ; GFX9-O3-NEXT: v_mov_b32_e32 v2, 0
122 ; GFX9-O3: v_add_u32_e32 v1, v1, v2
153 ; GFX9-O3-NEXT: v_mov_b32_e32 v6, 0
154 ; GFX9-O3-NEXT: v_mov_b32_e32 v7, 0
285 ; GFX9-O3: v_add_u32_e32 v1, v0, v0
290 ; GFX9-O3: v_sub_u32_e32 v0, v0, v1
306 ; GFX9-O3-NEXT: v_mov_b32_e32 v2, 0
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Darm64-irtranslator-gep.ll3 ; RUN: llc -O3 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck…
28 ; O3-LABEL: name: cse_gep
29 ; O3: bb.1 (%ir-block.0):
30 ; O3-NEXT: liveins: $w1, $x0
31 ; O3-NEXT: {{ $}}
32 ; O3-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
33 ; O3-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
34 ; O3-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
44 ; O3-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
48 ; O3-NEXT: $w0 = COPY [[ADD]](s32)
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Daarch64-tail-dup-size.ll3 ; RUN: llc -mtriple=aarch64-none-linux -O3 < %s | FileCheck %s --check-prefix=CHECK-O3
36 ; CHECK-O3-LABEL: testcase:
40 ; CHECK-O3-NEXT: cbz x9, .LBB0_2
42 ; CHECK-O3-NEXT: ldr x9, [x9]
43 ; CHECK-O3-NEXT: str x9, [x0]
47 ; CHECK-O3-NEXT: mov w0, #10
49 ; CHECK-O3-NEXT: b externalfunc
50 ; CHECK-O3-NEXT: .LBB0_2:
51 ; CHECK-O3-NEXT: mov x8, xzr
54 ; CHECK-O3-NEXT: mov w0, #10
[all …]
H A Daarch64-mops.ll129 ; GISel-MOPS-O3-NEXT: ret
187 ; GISel-MOPS-O3-NEXT: ret
252 ; GISel-MOPS-O3-NEXT: ret
302 ; GISel-MOPS-O3-NEXT: ret
351 ; GISel-MOPS-O3-NEXT: ret
463 ; GISel-MOPS-O3-NEXT: ret
530 ; GISel-MOPS-O3-NEXT: ret
597 ; GISel-MOPS-O3-NEXT: ret
663 ; GISel-MOPS-O3-NEXT: ret
731 ; GISel-MOPS-O3-NEXT: ret
[all …]
H A Demutls_generic.ll3 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-android -relocation-model=pic -O3 \
5 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-android -O3 \
7 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-windows-gnu -O3 \
9 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-apple-darwin -O3 \
14 ; RUN: llc < %s -mtriple=aarch64-linux-android -relocation-model=pic -O3 \
16 ; RUN: llc < %s -mtriple=aarch64-linux-android -O3 \
19 ; RUN: llc < %s -mtriple=aarch64-apple-darwin -O3 \
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/X86/
H A Dhoist-load-of-baseptr.ll4 ; RUN: opt -passes="default<O3>" -S < %s | FileCheck --check-prefixes=O3 %s
98 ; O3-NEXT: entry:
103 ; O3: for.cond1.preheader.us.preheader:
108 ; O3: for.cond1.preheader.us:
111 ; O3: vector.body:
128 ; O3: middle.block:
130 ; O3: for.body4.us.preheader:
132 ; O3-NEXT: br label [[FOR_BODY4_US:%.*]]
133 ; O3: for.body4.us:
146 ; O3: for.cond.cleanup:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Datomic64.ll155 ; O3-NEXT: nop
158 ; O3-NEXT: nop
312 ; O3-NEXT: nop
315 ; O3-NEXT: nop
469 ; O3-NEXT: nop
472 ; O3-NEXT: nop
626 ; O3-NEXT: nop
629 ; O3-NEXT: nop
783 ; O3-NEXT: nop
786 ; O3-NEXT: nop
[all …]
H A Datomic.ll266 ; O3-NEXT: nop
269 ; O3-NEXT: nop
522 ; O3-NEXT: nop
525 ; O3-NEXT: nop
778 ; O3-NEXT: nop
781 ; O3-NEXT: nop
1033 ; O3-NEXT: nop
1036 ; O3-NEXT: nop
1288 ; O3-NEXT: nop
1291 ; O3-NEXT: nop
[all …]
H A Dhelloworld.ll1 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | …
2 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | …
3 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | …
4 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s…
5 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s…
7 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | …
8 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32 -relocation-model=pic -O3 < %s | …
/llvm-project-15.0.7/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/
H A Damdgpu_no_merge_comments.ll.expected4 ; RUN: llc %S/amdgpu_no_merge_comments-O3.s | FileCheck -check-prefixes=GCN,GFX9-O3 %s
19 ; GFX9-O3-LABEL: main:
20 ; GFX9-O3: ; %bb.0:
21 ; GFX9-O3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
22 ; GFX9-O3-NEXT: v_add_u32_e32 v1, v0, v0
23 ; GFX9-O3-NEXT: v_mul_lo_u32 v0, v1, v0
24 ; GFX9-O3-NEXT: v_sub_u32_e32 v0, v0, v1
25 ; GFX9-O3-NEXT: s_setpc_b64 s[30:31]
/llvm-project-15.0.7/compiler-rt/cmake/caches/
H A DApple.cmake9 set(CMAKE_C_FLAGS_RELEASE "-O3" CACHE STRING "")
10 set(CMAKE_CXX_FLAGS_RELEASE "-O3" CACHE STRING "")
11 set(CMAKE_ASM_FLAGS_RELEASE "-O3" CACHE STRING "")
12 set(CMAKE_C_FLAGS_RELWITHDEBINFO "-O3 -gline-tables-only -DNDEBUG" CACHE STRING "")
13 set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "-O3 -gline-tables-only -DNDEBUG" CACHE STRING "")
14 set(CMAKE_ASM_FLAGS_RELWITHDEBINFO "-O3 -gline-tables-only -DNDEBUG" CACHE STRING "")
/llvm-project-15.0.7/llvm/test/Other/
H A Dnew-pm-defaults.ll17 ; RUN: -passes='default<O3>' -S %s 2>&1 \
31 ; RUN: -passes='default<O3>' -S %s 2>&1 \
35 ; RUN: -passes='default<O3>' -S %s 2>&1 \
39 ; RUN: -passes='default<O3>' -S %s 2>&1 \
43 ; RUN: -passes='default<O3>' -S %s 2>&1 \
47 ; RUN: -passes='default<O3>' -S %s 2>&1 \
51 ; RUN: -passes='default<O3>' -S %s 2>&1 \
55 ; RUN: -passes='default<O3>' -S %s 2>&1 \
59 ; RUN: -passes='default<O3>' -S %s 2>&1 \
67 ; RUN: -passes='default<O3>' -S %s 2>&1 \
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dmetadata-enable.ll254 ; O3-LABEL: @enabled(
255 ; O3-NEXT: entry:
369 ; O3-NEXT: ret i32 [[TMP78]]
1227 ; O3-LABEL: @nopragma(
1228 ; O3-NEXT: entry:
1342 ; O3-NEXT: ret i32 [[TMP78]]
1750 ; O3-LABEL: @disabled(
1751 ; O3-NEXT: entry:
1753 ; O3: for.body:
1763 ; O3: for.end:
[all …]
/llvm-project-15.0.7/clang/test/Driver/
H A Dhip-toolchain-opt.hip32 // RUN: %clang -### -O3 \
37 // RUN: 2>&1 | FileCheck --check-prefixes=ALL,O3 %s
65 // O3-SAME: "-O3"
79 // O3-SAME: "-plugin-opt=O3"
89 // O3-SAME: "-O3"
/llvm-project-15.0.7/polly/test/Support/
H A Dpipelineposition.ll2 ; RUN: opt %loadPolly -O3 -enable-new-pm=0 -polly -polly-position=early -disable…
3 ; RUN: opt %loadPolly -O3 -enable-new-pm=0 -polly -polly-position=early -polly-run-inliner -disable…
4 ; RUN: opt %loadPolly -O3 -enable-new-pm=0 -polly -polly-position=after-loopopt -disable…
5 ; RUN: opt %loadPolly -O3 -enable-new-pm=0 -polly -polly-position=before-vectorizer -disable…
8 ; RUN: opt %loadNPMPolly -O3 -enable-new-pm=1 -polly -polly-position=early -disa…
9 ; RUN: opt %loadNPMPolly -O3 -enable-new-pm=1 -polly -polly-position=early -polly-run-inliner -disa…
10 ; RUN: opt %loadNPMPolly -O3 -enable-new-pm=1 -polly -polly-position=before-vectorizer -disa…
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dopt-levels.ll2 …-passes="default<O3>" -unroll-runtime=true -unroll-threshold-default=0 -unroll-threshold-aggressiv…
6 ; Check that Os and Oz are optimized like O2, not like O3. To easily highlight
7 ; the behavior, we artificially disable unrolling for anything but O3 by setting
10 ; O3: loop1.preheader
/llvm-project-15.0.7/llvm/test/tools/llvm-lto2/X86/
H A Dslp-vectorize-pm.ll3 ; Test SLP and Loop Vectorization are enabled by default at O2 and O3.
16 ; RUN: llvm-lto2 run %t1.bc -o %t5.o -O3 -r %t1.bc,foo,plx -debug-pass-manager \
17 ; RUN: -save-temps 2>&1 | FileCheck %s --check-prefix=CHECK-O3-SLP
18 ; RUN: llvm-dis %t5.o.1.4.opt.bc -o - | FileCheck %s --check-prefix=CHECK-O3-LPV
23 ; CHECK-O3-SLP: Running pass: SLPVectorizerPass
27 ; CHECK-O3-LPV: = !{!"llvm.loop.isvectorized", i32 1}
/llvm-project-15.0.7/lld/test/ELF/lto/
H A Dslp-vectorize-pm.ll4 ; Test SLP and Loop Vectorization are enabled by default at O2 and O3.
14 …bug-pass-manager --plugin-opt=O3 --plugin-opt=save-temps -shared -o %t4.o %t.o 2>&1 | FileCheck %s…
15 ; RUN: llvm-dis %t.o.4.opt.bc -o - | FileCheck %s --check-prefix=CHECK-O3-LPV
20 ; CHECK-O3-SLP: Running pass: SLPVectorizerPass
24 ; CHECK-O3-LPV: = !{!"llvm.loop.isvectorized", i32 1}

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