| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyReplacePhysRegs.cpp | 76 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction()
84 unsigned VReg = WebAssembly::NoRegister; in runOnMachineFunction()
88 if (VReg == WebAssembly::NoRegister) { in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCRegister.h | 43 static constexpr unsigned NoRegister = 0u; variable
68 assert(Val == NoRegister || isPhysicalRegister(Val)); in from()
76 bool isValid() const { return Reg != NoRegister; } in isValid()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 357 if (RegNum == AVR::NoRegister) { in parseRegisterName()
360 if (RegNum == AVR::NoRegister) { in parseRegisterName()
370 if (RegNum == AVR::NoRegister) in parseRegisterName()
377 int RegNum = AVR::NoRegister; in parseRegister()
391 if (RegNum == AVR::NoRegister && RestoreOnFailure) { in parseRegister()
405 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
583 if (RegNo == AVR::NoRegister) in parseMemriOperand()
609 return (RegNo == AVR::NoRegister); in ParseRegister()
619 if (RegNo == AVR::NoRegister) in tryParseRegister()
749 if (RegNum != AVR::NoRegister) { in validateTargetOperandClass()
[all …]
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| /llvm-project-15.0.7/bolt/lib/Target/X86/ |
| H A D | X86MCPlusBuilder.cpp | 600 X86::NoRegister || in match()
602 X86::NoRegister && in match()
735 IndexRegNum != X86::NoRegister || SegRegNum != X86::NoRegister || in evaluateMemOperandTarget()
1140 IsIndexed = IndexRegNum != X86::NoRegister || SegRegNum != X86::NoRegister; in isStackAccess()
1335 if (BaseRegNum == X86::NoRegister || IndexRegNum != X86::NoRegister || in evaluateStackOffsetExpr()
2127 IndexRegNum != X86::NoRegister || SegRegNum != X86::NoRegister || in analyzePICJumpTable()
2170 BaseRegNumOut = X86::NoRegister; in analyzeIndirectBranch()
2171 IndexRegNumOut = X86::NoRegister; in analyzeIndirectBranch()
2289 VtableRegNum = X86::NoRegister; in analyzeVirtualMethodCall()
2290 MethodRegNum = X86::NoRegister; in analyzeVirtualMethodCall()
[all …]
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| H A D | X86MCSymbolizer.cpp | 68 if (Scale.getImm() != 0 && Index.getReg() != MCRegister::NoRegister) in tryAddingSymbolicOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUResourceUsageAnalysis.cpp | 181 MCPhysReg HighestVGPRReg = AMDGPU::NoRegister; in analyzeResourceUsage()
190 MCPhysReg HighestAGPRReg = AMDGPU::NoRegister; in analyzeResourceUsage()
197 Info.NumAGPR = HighestAGPRReg == AMDGPU::NoRegister in analyzeResourceUsage()
202 MCPhysReg HighestSGPRReg = AMDGPU::NoRegister; in analyzeResourceUsage()
212 Info.NumVGPR = HighestVGPRReg == AMDGPU::NoRegister in analyzeResourceUsage()
215 Info.NumExplicitSGPR = HighestSGPRReg == AMDGPU::NoRegister in analyzeResourceUsage()
259 case AMDGPU::NoRegister: in analyzeResourceUsage()
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| H A D | R600RegisterInfo.cpp | 66 static const MCPhysReg CalleeSavedReg = R600::NoRegister;
74 return R600::NoRegister; in getFrameRegister()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVMakeCompressible.cpp | 181 return RegImmPair(RISCV::NoRegister, 0); in getRegImmPairPreventingCompression()
214 return RegImmPair(RISCV::NoRegister, 0); in getRegImmPairPreventingCompression()
265 return RISCV::NoRegister; in analyzeCompressibleUses()
279 return RISCV::NoRegister; in analyzeCompressibleUses()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | MVETailPredUtils.h | 113 MIB.addReg(ARM::NoRegister);
121 MIB.addReg(ARM::NoRegister);
178 MIB.addReg(ARM::NoRegister);
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| H A D | Thumb1FrameLowering.cpp | 79 if (ScratchReg == ARM::NoRegister) in emitPrologueEpilogueSPUpdate()
184 ARM::NoRegister, MachineInstr::FrameSetup); in emitPrologue()
197 ARM::NoRegister, MachineInstr::FrameSetup); in emitPrologue()
422 unsigned ScratchRegister = ARM::NoRegister; in emitPrologue()
521 NumBytes - ArgRegsSaveSize, ARM::NoRegister, in emitEpilogue()
563 unsigned ScratchRegister = ARM::NoRegister; in emitEpilogue()
773 ArgRegsSaveSize + 4, ARM::NoRegister, in emitPopSpecialFixUp()
820 ARM::NoRegister, MachineInstr::FrameDestroy); in emitPopSpecialFixUp()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 135 VE::USRCC, VE::PSW, VE::SAR, VE::NoRegister,
136 VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::PMMR,
138 VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::NoRegister,
686 if (regIdx > 31 || MISCRegs[regIdx] == VE::NoRegister) in MorphToMISCReg()
815 if (RegNum == VE::NoRegister) { in parseRegisterName()
841 if (RegNo == VE::NoRegister) in tryParseRegister()
844 if (RegNo != VE::NoRegister) { in tryParseRegister()
1316 unsigned BaseReg = VE::NoRegister; in parseMEMAsOperand()
1354 Operands.push_back(BaseReg != VE::NoRegister in parseMEMAsOperand()
1360 if (BaseReg != VE::NoRegister) in parseMEMAsOperand()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | LVLGen.cpp | 57 return VE::NoRegister; in getVL()
78 if (Reg != VE::NoRegister) { in runOnMachineBasicBlock()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 121 assert(Reg == MCRegister::NoRegister || in asMCReg()
126 bool isValid() const { return Reg != MCRegister::NoRegister; } in isValid()
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| H A D | LiveRegMatrix.h | 141 MCRegister PhysReg = MCRegister::NoRegister);
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| H A D | RegisterClassInfo.h | 122 return MCRegister::NoRegister; in getLastCalleeSavedAlias()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 118 VE::USRCC, VE::PSW, VE::SAR, VE::NoRegister,
119 VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::PMMR,
121 VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::NoRegister,
170 unsigned Reg = VE::NoRegister; in DecodeV64RegisterClass()
207 if (Reg == VE::NoRegister) in DecodeMISCRegisterClass()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 505 assert(Producer != Hexagon::NoRegister); in getSingleInstruction()
520 assert(Producer != Hexagon::NoRegister); in getSingleInstruction()
686 static_assert(NoRegister == 0, "Expecting NoRegister to be 0"); in DecodeCtrRegsRegisterClass()
687 if (CtrlRegDecoderTable[RegNo] == NoRegister) in DecodeCtrRegsRegisterClass()
714 static_assert(NoRegister == 0, "Expecting NoRegister to be 0"); in DecodeCtrRegs64RegisterClass()
715 if (CtrlReg64DecoderTable[RegNo] == NoRegister) in DecodeCtrRegs64RegisterClass()
813 if (SysRegDecoderTable[RegNo] == Hexagon::NoRegister) in DecodeSysRegsRegisterClass()
841 if (SysReg64DecoderTable[RegNo] == Hexagon::NoRegister) in DecodeSysRegs64RegisterClass()
867 if (GuestRegDecoderTable[RegNo] == Hexagon::NoRegister) in DecodeGuestRegsRegisterClass()
894 if (GuestReg64DecoderTable[RegNo] == Hexagon::NoRegister) in DecodeGuestRegs64RegisterClass()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 320 if (!((Base.isReg() && Base.getReg() != X86::NoRegister) || Base.isFI())) in isRelevantAddressingMode()
326 if (!(Index.isReg() && Index.getReg() == X86::NoRegister)) in isRelevantAddressingMode()
328 if (!(Segment.isReg() && Segment.getReg() == X86::NoRegister)) in isRelevantAddressingMode()
398 .addReg(X86::NoRegister) in buildCopy()
400 .addReg(X86::NoRegister) in buildCopy()
417 .addReg(X86::NoRegister) in buildCopy()
419 .addReg(X86::NoRegister) in buildCopy()
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| H A D | X86LoadValueInjectionRetHardening.cpp | 83 if (ClobberReg != X86::NoRegister) { in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 82 Register InReg = PPC::NoRegister; in processBlock()
152 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 37 HexagonMCChecker::Unconditional(Hexagon::NoRegister, false);
94 unsigned PredReg = Hexagon::NoRegister; in init()
139 unsigned R = MCI.getOperand(i).getReg(), S = Hexagon::NoRegister; in init()
460 if (ProducerPredInfo.Register != Hexagon::NoRegister && in checkNewValues()
580 (ProducerPredicate.Register == Hexagon::NoRegister || in registerProducer()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 275 if (RegNo == LoongArch::NoRegister) in matchRegisterNameHelper()
278 return RegNo == LoongArch::NoRegister; in matchRegisterNameHelper()
305 if (RegNo == LoongArch::NoRegister) in parseRegister()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2725 if (SrcReg != Mips::NoRegister) in loadImmediate()
4759 unsigned ATReg = Mips::NoRegister; in expandAliasImmediate()
4847 if (FinalDstReg == Mips::NoRegister) in expandAliasImmediate()
4859 unsigned ATReg = Mips::NoRegister; in expandRotation()
4922 unsigned ATReg = Mips::NoRegister; in expandRotationImm()
4984 unsigned ATReg = Mips::NoRegister; in expandDRotation()
5047 unsigned ATReg = Mips::NoRegister; in expandDRotationImm()
5157 unsigned ATReg = Mips::NoRegister; in expandMulImm()
5180 unsigned ATReg = Mips::NoRegister; in expandMulO()
5222 unsigned ATReg = Mips::NoRegister; in expandMulOU()
[all …]
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | GlobalISelEmitter-zero-reg.td | 37 // CHECK-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::NoRegister, /*AddRegisterRegFlags*/0,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | InterferenceCache.h | 105 PhysReg = MCRegister::NoRegister; in clear()
|