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Searched refs:NextMI (Results 1 – 12 of 12) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIPostRABundler.cpp56 bool canBundle(const MachineInstr &MI, const MachineInstr &NextMI) const;
115 const MachineInstr &NextMI) const { in canBundle()
118 return (IMemFlags != 0 && MI.mayLoadOrStore() && !NextMI.isBundled() && in canBundle()
119 NextMI.mayLoad() == MI.mayLoad() && NextMI.mayStore() == MI.mayStore() && in canBundle()
120 ((NextMI.getDesc().TSFlags & MemFlags) == IMemFlags) && in canBundle()
121 !isDependentLoad(NextMI)); in canBundle()
H A DGCNRegPressure.cpp347 NextMI = &MI; in reset()
348 NextMI = skipDebugInstructionsForward(NextMI, MBBEnd); in reset()
349 if (NextMI == MBBEnd) in reset()
351 GCNRPTracker::reset(*NextMI, LiveRegsCopy, false); in reset()
358 NextMI = skipDebugInstructionsForward(NextMI, MBBEnd); in advanceBeforeNext()
359 if (NextMI == MBBEnd) in advanceBeforeNext()
362 SlotIndex SI = LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
391 LastTrackedMI = &*NextMI++; in advanceToNext()
392 NextMI = skipDebugInstructionsForward(NextMI, MBBEnd); in advanceToNext()
412 if ((NextMI == MBBEnd) || (LastTrackedMI && !advanceBeforeNext())) in advance()
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H A DGCNRegPressure.h163 MachineBasicBlock::const_iterator NextMI; variable
170 MachineBasicBlock::const_iterator getNext() const { return NextMI; } in getNext()
H A DSIShrinkInstructions.cpp771 if (auto *NextMI = matchSwap(MI)) { in runOnMachineFunction() local
772 Next = NextMI->getIterator(); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DStackSlotColoring.cpp435 MachineBasicBlock::iterator NextMI = std::next(I); in RemoveDeadStores() local
445 while ((NextMI != E) && NextMI->isDebugInstr()) { in RemoveDeadStores()
446 ++NextMI; in RemoveDeadStores()
449 if (NextMI == E) continue; in RemoveDeadStores()
450 if (!(StoreReg = TII->isStoreToStackSlot(*NextMI, SecondSS, StoreSize))) in RemoveDeadStores()
459 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
464 toErase.push_back(&*NextMI); in RemoveDeadStores()
H A DSlotIndexes.cpp148 MachineInstr &NextMI = *Next; in removeSingleMachineInstrFromMaps() local
149 MIEntry.setInstr(&NextMI); in removeSingleMachineInstrFromMaps()
150 mi2iMap.insert(std::make_pair(&NextMI, MIIndex)); in removeSingleMachineInstrFromMaps()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp249 MachineInstr *NextMI = LastMIs[Idx]; in FindMLxHazard() local
250 if (!NextMI) in FindMLxHazard()
253 if (TII->canCauseFpMLxStall(NextMI->getOpcode())) { in FindMLxHazard()
259 if (i <= Limit2 && hasRAWHazard(getDefReg(MI), NextMI)) in FindMLxHazard()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp381 for (auto NextMI = NextMBBI; NextMI != MBB.end(); NextMI++) { in shouldUseFrameHelper() local
382 if (NextMI->readsRegister(AArch64::W16, TRI)) in shouldUseFrameHelper()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp437 MachineInstr *NextMI = CBr->getNextNode(); in processSwitches() local
438 assert(NextMI->getOpcode() == SPIRV::G_BR && in processSwitches()
439 NextMI->getOperand(0).isMBB()); in processSwitches()
440 MachineBasicBlock *NextMBB = NextMI->getOperand(0).getMBB(); in processSwitches()
H A DSPIRVAsmPrinter.cpp233 const MachineInstr *NextMI = MI->getNextNode(); in emitInstruction() local
235 (!NextMI || !isFuncOrHeaderInstr(NextMI, TII))) { in emitInstruction()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp1364 MachineInstr &NextMI = *NextMII; in isLegalToPacketizeTogether() local
1367 const MachineOperand &NOp0 = NextMI.getOperand(0); in isLegalToPacketizeTogether()
1368 const MachineOperand &NOp1 = NextMI.getOperand(1); in isLegalToPacketizeTogether()
1811 MachineBasicBlock::instr_iterator NextMI = std::next(MI->getIterator()); in endPacket() local
1812 for (auto &I : make_range(HII->expandVGatherPseudo(*MI), NextMI)) in endPacket()
/llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/
H A DCodeViewDebug.cpp3069 for (const auto &NextMI : *MI->getParent()) { in beginInstruction()
3070 if (NextMI.isDebugInstr()) in beginInstruction()
3072 DL = NextMI.getDebugLoc(); in beginInstruction()