Searched refs:NewLd (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULateCodeGenPrepare.cpp | 171 LoadInst *NewLd = IRB.CreateAlignedLoad(IRB.getInt32Ty(), NewPtr, Align(4)); in visitLoadInst() local
172 NewLd->copyMetadata(LI); in visitLoadInst()
173 NewLd->setMetadata(LLVMContext::MD_range, nullptr); in visitLoadInst()
177 IRB.CreateTrunc(IRB.CreateLShr(NewLd, ShAmt), IntNTy), LI.getType()); in visitLoadInst()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 199 LoadInst *NewLd = nullptr; member in __anonea9789b90111::WidenedLoad
204 : NewLd(Wide) { in WidenedLoad()
208 return NewLd; in getLoad()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10763 SDValue NewLd = DAG.getLoad( in visitMLOAD() local
10767 return CombineTo(N, NewLd, NewLd.getValue(1)); in visitMLOAD()
21522 SDValue NewLd = DAG.getLoad(VT, DL, Ld->getChain(), NewAddr, MMO); in narrowExtractedVectorLoad() local
21523 DAG.makeEquivalentMemoryOrdering(Ld, NewLd); in narrowExtractedVectorLoad()
21524 return NewLd; in narrowExtractedVectorLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 9308 SDValue NewLd = in EltsFromConsecutiveLoads() local
9314 DAG.makeEquivalentMemoryOrdering(LD, NewLd); in EltsFromConsecutiveLoads()
9315 return NewLd; in EltsFromConsecutiveLoads()
25762 assert(NewLd->getNumValues() == 2 && "Loads must carry a chain!"); in LowerLoad()
25764 SDValue Val = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, NewLd); in LowerLoad()
25768 return DAG.getMergeValues({Val, NewLd.getValue(1)}, dl); in LowerLoad()
49592 SDValue NewLd = DAG.getLoad(MVT::f64, LdDL, Ld->getChain(), in combineStore() local
49596 DAG.makeEquivalentMemoryOrdering(Ld, NewLd); in combineStore()
49597 return DAG.getStore(St->getChain(), StDL, NewLd, St->getBasePtr(), in combineStore()
55006 DAG.ReplaceAllUsesOfValueWith(SDValue(LN, 1), NewLd.getValue(1)); in combineMOVDQ2Q()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11121 SDValue NewLd = DAG.getMemIntrinsicNode( in LowerFP_EXTEND() local
11124 return DAG.getNode(PPCISD::FP_EXTEND_HALF, dl, MVT::v2f64, NewLd, in LowerFP_EXTEND()
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