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Searched refs:ModelName (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp315 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
658 OS << "\nstatic const unsigned " << ProcModel.ModelName in EmitProcessorResourceSubUnits()
703 OS << ProcModel.ModelName << "RegisterCosts,\n "; in EmitRegisterFileInfo()
848 OS << ProcModel.ModelName << "ProcResourceSubUnits + " in EmitProcessorResources()
899 ProcModel.ModelName); in FindWriteResources()
951 ProcModel.ModelName); in FindReadAdvance()
1090 LLVM_DEBUG(dbgs() << ProcModel.ModelName in GenSchedClassTables()
1337 << PI->ModelName << "SchedClasses[] = {\n"; in EmitSchedClassTables()
1365 OS << "}; // " << PI->ModelName << "SchedClasses\n"; in EmitSchedClassTables()
1407 << " " << PM.ModelName << "SchedClasses" << ",\n" in EmitProcessorModels()
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H A DCodeGenSchedule.cpp815 "defined for processor " + ProcModel.ModelName + in expandRWSeqForProc()
944 LLVM_DEBUG(dbgs() << "InstRW on " << ProcModel.ModelName << " for " in collectSchedClasses()
964 << " on processor " << PM.ModelName << '\n'; in collectSchedClasses()
1262 + " in ItinResources for " + PM.ModelName); in inferFromItinClass()
1470 PM.ModelName + in getIntersectingVariants()
2017 PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName + in checkCompleteness()
2051 + " in ItinResources for " + PM.ModelName); in collectItinProcResources()
2194 "the ProcResources list for " + ModelName); in getProcResourceIdx()
2211 dbgs() << Index << ": " << ModelName << " " in dump()
H A DCodeGenSchedule.h216 std::string ModelName; member
254 Index(Idx), ModelName(std::move(Name)), ModelDef(MDef), ItinsDef(IDef), in CodeGenProcModel()
H A DDFAPacketizerEmitter.cpp261 OS << " " << ProcModelStartIdx[Model] << ", // " << Model->ModelName in emitForItineraries()