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Searched refs:MachineLICM (Results 1 – 18 of 18) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlicm-regpressure.ll2 ; This tests currently fails as MachineLICM does not compute register pressure
6 ; MachineLICM should take register pressure into account.
H A Dlicm-symbol.ll3 ; MachineLICM should be able to hoist the sF reference out of the loop.
H A Dlicm-dominance.ll4 ; MachineLICM should check dominance before hoisting instructions.
H A Dlicm-nested.ll4 ; MachineLICM should be able to hoist the symbolic addresses out of
H A Drdrand.ll81 ; Check that MachineLICM doesn't hoist rdrand instructions.
H A Dpostra-licm.ll4 ; MachineLICM should be able to hoist loop invariant reload out of the loop.
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dmachinelicm-cse-dead-flag.mir6 # This case tests that after the dead %3 is CSE-ed with hoisted %5 in MachineLICM
48 # MachineLICM pass, the dead flag will be kept.
H A Dlicm-remat.ll5 ; Verify MachineLICM will always hoist trivially rematerializable instructions even when register p…
/llvm-project-15.0.7/llvm/test/CodeGen/XCore/
H A Dlicm-ldwcp.ll3 ; MachineLICM should hoist the LDWCP out of the loop.
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dselect-const-pool.mir16 ; Check that we have an MMO on the load, which is needed for MachineLICM to hoist it.
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dfmov-imm-licm.ll4 ; only materializes an immediate is not MachineLICM'd out of a loop.
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineLICM.cpp275 class MachineLICM : public MachineLICMBase { class
278 MachineLICM() : MachineLICMBase(ID, false) { in MachineLICM() function in __anonfbf8dede0111::MachineLICM
293 char MachineLICM::ID;
296 char &llvm::MachineLICMID = MachineLICM::ID;
299 INITIALIZE_PASS_BEGIN(MachineLICM, DEBUG_TYPE,
305 INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE, in INITIALIZE_PASS_DEPENDENCY()
H A DCMakeLists.txt118 MachineLICM.cpp
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dmachinelicm-sunk-kill-flags.mir4 # Test kill flags are cleared after sinking operations into cycle during MachineLICM.
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/CodeGen/
H A DBUILD.gn125 "MachineLICM.cpp",
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dthumb2-tbh.ll6 ; FIXME: Thumb1 tests temporarily disabled; MachineLICM is now hoisting the
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dlicm-regpressure.mir4 # MachineLICM shall limit hoisting of V_CVT instructions out of the loop keeping
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dmachinelicm-address-pseudos.ll7 ; Verifies that MachineLICM can hoist address generation pseudos out of loops.