Home
last modified time | relevance | path

Searched refs:MachineInstr (Results 1 – 25 of 849) sorted by relevance

12345678910>>...34

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombinerHelper.h37 class MachineInstr; variable
51 MachineInstr *MI;
73 MachineInstr *Logic;
74 MachineInstr *Shift2;
177 bool isPredecessor(const MachineInstr &DefMI, const MachineInstr &UseMI);
185 bool dominates(const MachineInstr &DefMI, const MachineInstr &UseMI);
211 bool matchCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
212 void applyCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
573 bool matchExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
574 void applyExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
[all …]
H A DLegalizerHelper.h36 class MachineInstr; variable
370 LegalizeResult lowerRotate(MachineInstr &MI);
373 LegalizeResult lowerUITOFP(MachineInstr &MI);
374 LegalizeResult lowerSITOFP(MachineInstr &MI);
375 LegalizeResult lowerFPTOUI(MachineInstr &MI);
376 LegalizeResult lowerFPTOSI(MachineInstr &MI);
380 LegalizeResult lowerFPOWI(MachineInstr &MI);
382 LegalizeResult lowerMinMax(MachineInstr &MI);
385 LegalizeResult lowerFMad(MachineInstr &MI);
387 LegalizeResult lowerFFloor(MachineInstr &MI);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h34 class MachineInstr; variable
72 const MachineInstr &MI,
79 const MachineInstr &MI,
208 const MachineInstr &LdSt,
230 bool PredicateInstruction(MachineInstr &MI,
365 bool isDuplexPair(const MachineInstr &MIa, const MachineInstr &MIb) const;
399 bool isSolo(const MachineInstr &MI) const;
401 bool isTC1(const MachineInstr &MI) const;
402 bool isTC2(const MachineInstr &MI) const;
404 bool isTC4x(const MachineInstr &MI) const;
[all …]
H A DHexagonVLIWPacketizer.h23 class MachineInstr; variable
29 std::vector<MachineInstr *> OldPacketMIs;
140 bool useCallersSP(MachineInstr &MI);
141 void useCalleesSP(MachineInstr &MI);
144 bool arePredicatesComplements(MachineInstr &MI1, MachineInstr &MI2);
147 bool isCurifiable(MachineInstr &MI);
148 bool cannotCoexist(const MachineInstr &MI, const MachineInstr &MJ);
157 bool hasDeadDependence(const MachineInstr &I, const MachineInstr &J);
158 bool hasControlDependence(const MachineInstr &I, const MachineInstr &J);
159 bool hasRegMaskDependence(const MachineInstr &I, const MachineInstr &J);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.h25 class MachineInstr; variable
43 MachineInstr *CurrCycleInstr;
44 std::list<MachineInstr*> EmittedInstrs;
78 int checkSMRDHazards(MachineInstr *SMRD);
79 int checkVMEMHazards(MachineInstr* VMEM);
80 int checkDPPHazards(MachineInstr *DPP);
88 int checkRFEHazards(MachineInstr *RFE);
93 void fixHazards(MachineInstr *MI);
103 bool fixWMMAHazards(MachineInstr *MI);
105 int checkMAIHazards(MachineInstr *MI);
[all …]
H A DAMDGPUInstructionSelector.h38 class MachineInstr; variable
57 bool select(MachineInstr &I) override;
88 bool selectCOPY(MachineInstr &I) const;
89 bool selectPHI(MachineInstr &I) const;
90 bool selectG_TRUNC(MachineInstr &I) const;
93 bool selectG_FNEG(MachineInstr &I) const;
94 bool selectG_FABS(MachineInstr &I) const;
105 bool selectG_INSERT(MachineInstr &I) const;
112 bool selectBallot(MachineInstr &I) const;
128 bool selectG_ICMP(MachineInstr &I) const;
[all …]
H A DAMDGPULegalizerInfo.h46 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
66 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
77 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
82 bool legalizeFlog(MachineInstr &MI, MachineIRBuilder &B,
132 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
197 MachineInstr &MI, MachineIRBuilder &B,
[all …]
H A DSIInstrInfo.h101 MachineInstr &Inst,
145 bool swapSourceModifiers(MachineInstr &MI,
149 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
196 const MachineInstr &LdSt,
247 std::pair<MachineInstr*, MachineInstr*>
248 expandMovDPP64(MachineInstr &MI) const;
339 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
344 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
896 bool canShrink(const MachineInstr &MI,
899 MachineInstr *buildShrunkInst(MachineInstr &MI,
[all …]
H A DR600InstrInfo.h34 class MachineInstr; variable
94 bool isTransOnly(const MachineInstr &MI) const;
96 bool isVectorOnly(const MachineInstr &MI) const;
100 bool usesVertexCache(const MachineInstr &MI) const;
102 bool usesTextureCache(const MachineInstr &MI) const;
105 bool usesAddressRegister(MachineInstr &MI) const;
107 bool readsLDSSrcReg(const MachineInstr &MI) const;
119 getSrcs(MachineInstr &MI) const;
156 bool isVector(const MachineInstr &MI) const;
202 bool PredicateInstruction(MachineInstr &MI,
[all …]
H A DAMDGPURegisterBankInfo.h52 MachineInstr &MI,
66 MachineInstr &MI,
69 bool executeInWaterfallLoop(MachineInstr &MI,
75 bool applyMappingDynStackAlloc(MachineInstr &MI,
78 bool applyMappingLoad(MachineInstr &MI,
82 applyMappingImage(MachineInstr &MI,
104 getInstrMappingForLoad(const MachineInstr &MI) const;
154 bool isSALUMapping(const MachineInstr &MI) const;
159 const MachineInstr &MI) const;
185 bool foldExtractEltToCmpSelect(MachineInstr &MI,
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h163 virtual MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
424 virtual MachineInstr *convertToThreeAddress(MachineInstr &MI, in convertToThreeAddress()
452 MachineInstr *
783 MachineInstr *IndVar, MachineInstr &Cmp, in reduceLoopCount()
958 virtual MachineInstr *optimizeSelect(MachineInstr &MI,
1111 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
1118 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
1189 void reassociateOps(MachineInstr &Root, MachineInstr &Prev,
1217 virtual MachineInstr *
1567 virtual MachineInstr *optimizeLoadInstr(MachineInstr &MI, in optimizeLoadInstr()
[all …]
H A DReachingDefAnalysis.h34 class MachineInstr; variable
94 DenseMap<MachineInstr *, int> InstIds;
145 bool hasSameReachingDef(MachineInstr *A, MachineInstr *B,
159 MachineInstr *getUniqueReachingMIDef(MachineInstr *MI,
164 MachineInstr *getMIOperand(MachineInstr *MI, unsigned Idx) const;
168 MachineInstr *getMIOperand(MachineInstr *MI, MachineOperand &MO) const;
213 bool isSafeToMoveForwards(MachineInstr *From, MachineInstr *To) const;
216 bool isSafeToMoveBackwards(MachineInstr *From, MachineInstr *To) const;
257 void processDefs(MachineInstr *);
261 bool isSafeToMove(MachineInstr *From, MachineInstr *To) const;
[all …]
H A DModuloSchedule.h74 class MachineInstr; variable
90 DenseMap<MachineInstr *, int> Cycle;
134 int getStage(MachineInstr *MI) { in getStage()
140 int getCycle(MachineInstr *MI) { in getCycle()
167 using InstrMapTy = DenseMap<MachineInstr *, MachineInstr *>;
212 void updateMemOperands(MachineInstr &NewMI, MachineInstr &OldMI,
214 MachineInstr *cloneInstr(MachineInstr *OldMI, unsigned CurStageNum,
216 MachineInstr *cloneAndChangeInstr(MachineInstr *OldMI, unsigned CurStageNum,
319 DenseMap<MachineInstr *, MachineInstr *> CanonicalMIs;
320 DenseMap<std::pair<MachineBasicBlock *, MachineInstr *>, MachineInstr *>
[all …]
H A DLiveVariables.h90 std::vector<MachineInstr*> Kills;
95 bool removeKill(MachineInstr &MI) { in removeKill()
136 std::vector<MachineInstr *> PhysRegDef;
141 std::vector<MachineInstr *> PhysRegUse;
147 DenseMap<MachineInstr*, unsigned> DistanceMap;
157 void HandlePhysRegUse(Register Reg, MachineInstr &MI);
158 void HandlePhysRegDef(Register Reg, MachineInstr *MI,
164 MachineInstr *FindLastRefOrPartRef(Register Reg);
169 MachineInstr *FindLastPartialDef(Register Reg,
201 MachineInstr &NewMI);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.h33 AC_EVEX_2_VEX = MachineInstr::TAsmComments
77 bool isX87Instruction(MachineInstr &MI);
272 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
342 const MachineInstr &LdSt,
389 MachineInstr *
488 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
510 void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
536 MachineInstr *optimizeLoadInstr(MachineInstr &MI,
588 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
602 MachineInstr *convertToThreeAddressWithLEA(unsigned MIOpc, MachineInstr &MI,
[all …]
H A DX86AsmPrinter.h82 void LowerSTACKMAP(const MachineInstr &MI);
83 void LowerPATCHPOINT(const MachineInstr &MI, X86MCInstLower &MCIL);
91 void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
96 void LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
102 void LowerASAN_CHECK_MEMACCESS(const MachineInstr &MI);
105 void EmitSEHInstruction(const MachineInstr *MI);
109 void PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
112 void PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
132 void emitInstruction(const MachineInstr *MI) override;
136 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.h125 SmallVector<MachineInstr *, 2> DefUses;
126 SmallVector<MachineInstr *, 2> UseDefs;
136 MachineInstr *skipCopiesOutgoing(MachineInstr *MI) const;
143 MachineInstr *skipCopiesIncoming(MachineInstr *MI) const;
156 DenseMap<const MachineInstr *, SmallVector<const MachineInstr *, 2>>
159 DenseMap<const MachineInstr *, InstType> Types;
162 bool visit(const MachineInstr *MI, const MachineInstr *WaitingForTypeOfMI,
166 bool visitAdjacentInstrs(const MachineInstr *MI,
181 void startVisit(const MachineInstr *MI) { in startVisit()
203 const SmallVectorImpl<const MachineInstr *> &
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h209 bool simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,
213 bool transformToNewImmFormFedByAdd(MachineInstr &MI, MachineInstr &DefMI,
230 MachineInstr *getForwardingDefMI(MachineInstr &MI,
278 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
485 void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
571 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
574 bool onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
708 bool combineRLWINM(MachineInstr &MI, MachineInstr **ToErase = nullptr) const;
734 void fixupIsDeadOrKill(MachineInstr *StartMI, MachineInstr *EndMI,
745 MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI,
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h66 static bool isGPRZero(const MachineInstr &MI);
69 static bool isGPRCopy(const MachineInstr &MI);
72 static bool isFPRCopy(const MachineInstr &MI);
98 static bool isPreLd(const MachineInstr &MI);
101 static bool isPreSt(const MachineInstr &MI);
104 static bool isPreLdSt(const MachineInstr &MI);
116 static bool isFpOrNEON(const MachineInstr &MI);
119 static bool isQForm(const MachineInstr &MI);
198 MachineInstr *
397 examineCFlagsUse(MachineInstr &MI, MachineInstr &CmpInstr,
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h73 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
83 MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
118 bool verifyInstruction(const MachineInstr &MI,
167 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
171 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
183 MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
192 bool isSEXT_W(const MachineInstr &MI);
193 bool isZEXT_W(const MachineInstr &MI);
194 bool isZEXT_B(const MachineInstr &MI);
198 bool isRVVSpill(const MachineInstr &MI);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp77 MachineInstr *tryToCombine(MachineInstr &Ldst);
85 bool canHoistLoadStoreTo(MachineInstr *Ldst, MachineInstr *To);
95 MachineInstr *canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add,
199 MachineInstr *ARCOptAddrMode::tryToCombine(MachineInstr &Ldst) { in tryToCombine()
247 LLVM_DEBUG(MachineInstr *First = &Ldst; MachineInstr *Last = &Add; in tryToCombine()
275 MachineInstr *
276 ARCOptAddrMode::canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add, in canJoinInstructions()
280 MachineInstr *First = Add; in canJoinInstructions()
281 MachineInstr *Last = Ldst; in canJoinInstructions()
327 MachineInstr *Result = nullptr; in canJoinInstructions()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h182 void expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
190 void expandLoadStackGuard(MachineInstr *MI) const;
212 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
220 unsigned isLoadFromStackSlot(const MachineInstr &MI,
222 unsigned isStoreToStackSlot(const MachineInstr &MI,
246 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
259 bool PredicateInstruction(MachineInstr &MI,
274 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
276 MachineInstr *
282 MachineInstr *foldMemoryOperandImpl(
[all …]
H A DSystemZElimCompare.cpp82 bool convertToBRCT(MachineInstr &MI, MachineInstr &Compare,
84 bool convertToLoadAndTrap(MachineInstr &MI, MachineInstr &Compare,
86 bool convertToLoadAndTest(MachineInstr &MI, MachineInstr &Compare,
88 bool convertToLogical(MachineInstr &MI, MachineInstr &Compare,
90 bool adjustCCMasksForInstr(MachineInstr &MI, MachineInstr &Compare,
190 MachineInstr &MI, MachineInstr &Compare, in convertToBRCT()
244 MachineInstr &MI, MachineInstr &Compare, in convertToLoadAndTrap()
284 MachineInstr &MI, MachineInstr &Compare, in convertToLoadAndTest()
312 MachineInstr &MI, MachineInstr &Compare, in convertToLogical()
360 MachineInstr &MI, MachineInstr &Compare, in adjustCCMasksForInstr()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h61 const MachineInstr &MI, unsigned DefIdx,
101 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
123 MachineInstr *convertToThreeAddress(MachineInstr &MI, LiveVariables *LV,
171 bool PredicateInstruction(MachineInstr &MI,
227 const MachineInstr &Orig,
230 MachineInstr &
238 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
302 bool analyzeSelect(const MachineInstr &MI,
306 MachineInstr *optimizeSelect(MachineInstr &MI,
312 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp83 static bool canHandle(const MachineInstr *MI);
88 bool canReorder(const MachineInstr *A, const MachineInstr *B);
123 MachineInstr *MemOperation;
126 MachineInstr *CheckOperation;
139 MachineInstr *OnlyDependency;
142 explicit NullCheck(MachineInstr *memOperation, MachineInstr *checkOperation, in NullCheck()
171 MachineInstr *insertFaultingInstr(MachineInstr *MI, MachineBasicBlock *MBB,
212 bool canHoistInst(MachineInstr *FaultingMI,
407 MachineInstr *ModifyingMI = nullptr; in isSuitableMemoryOp()
410 const MachineInstr *CurrMI = &*It; in isSuitableMemoryOp()
[all …]

12345678910>>...34