Lines Matching refs:MachineInstr
38 class MachineInstr; variable
57 bool select(MachineInstr &I) override;
73 bool isInstrUniform(const MachineInstr &MI) const;
81 bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
87 bool constrainCopyLikeIntrin(MachineInstr &MI, unsigned NewOpc) const;
88 bool selectCOPY(MachineInstr &I) const;
89 bool selectPHI(MachineInstr &I) const;
90 bool selectG_TRUNC(MachineInstr &I) const;
91 bool selectG_SZA_EXT(MachineInstr &I) const;
92 bool selectG_CONSTANT(MachineInstr &I) const;
93 bool selectG_FNEG(MachineInstr &I) const;
94 bool selectG_FABS(MachineInstr &I) const;
95 bool selectG_AND_OR_XOR(MachineInstr &I) const;
96 bool selectG_ADD_SUB(MachineInstr &I) const;
97 bool selectG_UADDO_USUBO_UADDE_USUBE(MachineInstr &I) const;
98 bool selectG_AMDGPU_MAD_64_32(MachineInstr &I) const;
99 bool selectG_EXTRACT(MachineInstr &I) const;
100 bool selectG_MERGE_VALUES(MachineInstr &I) const;
101 bool selectG_UNMERGE_VALUES(MachineInstr &I) const;
102 bool selectG_BUILD_VECTOR_TRUNC(MachineInstr &I) const;
103 bool selectG_PTR_ADD(MachineInstr &I) const;
104 bool selectG_IMPLICIT_DEF(MachineInstr &I) const;
105 bool selectG_INSERT(MachineInstr &I) const;
106 bool selectG_SBFX_UBFX(MachineInstr &I) const;
108 bool selectInterpP1F16(MachineInstr &MI) const;
109 bool selectWritelane(MachineInstr &MI) const;
110 bool selectDivScale(MachineInstr &MI) const;
111 bool selectIntrinsicIcmp(MachineInstr &MI) const;
112 bool selectBallot(MachineInstr &I) const;
113 bool selectRelocConstant(MachineInstr &I) const;
114 bool selectGroupStaticSize(MachineInstr &I) const;
115 bool selectReturnAddress(MachineInstr &I) const;
116 bool selectG_INTRINSIC(MachineInstr &I) const;
118 bool selectEndCfIntrinsic(MachineInstr &MI) const;
119 bool selectDSOrderedIntrinsic(MachineInstr &MI, Intrinsic::ID IID) const;
120 bool selectDSGWSIntrinsic(MachineInstr &MI, Intrinsic::ID IID) const;
121 bool selectDSAppendConsume(MachineInstr &MI, bool IsAppend) const;
122 bool selectSBarrier(MachineInstr &MI) const;
124 bool selectImageIntrinsic(MachineInstr &MI,
126 bool selectG_INTRINSIC_W_SIDE_EFFECTS(MachineInstr &I) const;
128 bool selectG_ICMP(MachineInstr &I) const;
130 void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI,
133 void initM0(MachineInstr &I) const;
134 bool selectG_LOAD_STORE_ATOMICRMW(MachineInstr &I) const;
135 bool selectG_SELECT(MachineInstr &I) const;
136 bool selectG_BRCOND(MachineInstr &I) const;
137 bool selectG_GLOBAL_VALUE(MachineInstr &I) const;
138 bool selectG_PTRMASK(MachineInstr &I) const;
139 bool selectG_EXTRACT_VECTOR_ELT(MachineInstr &I) const;
140 bool selectG_INSERT_VECTOR_ELT(MachineInstr &I) const;
141 bool selectG_SHUFFLE_VECTOR(MachineInstr &I) const;
142 bool selectAMDGPU_BUFFER_ATOMIC_FADD(MachineInstr &I) const;
143 bool selectGlobalAtomicFadd(MachineInstr &I, MachineOperand &AddrOp,
145 bool selectBufferLoadLds(MachineInstr &MI) const;
146 bool selectGlobalLoadLds(MachineInstr &MI) const;
147 bool selectBVHIntrinsic(MachineInstr &I) const;
148 bool selectSMFMACIntrin(MachineInstr &I) const;
149 bool selectWaveAddress(MachineInstr &I) const;
298 void renderTruncImm32(MachineInstrBuilder &MIB, const MachineInstr &MI,
301 void renderTruncTImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
304 void renderNegateImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
307 void renderBitcastImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
310 void renderPopcntImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
312 void renderExtractCPol(MachineInstrBuilder &MIB, const MachineInstr &MI,
314 void renderExtractSWZ(MachineInstrBuilder &MIB, const MachineInstr &MI,
316 void renderSetGLC(MachineInstrBuilder &MIB, const MachineInstr &MI,
319 void renderFrameIndex(MachineInstrBuilder &MIB, const MachineInstr &MI,
329 bool isUnneededShiftMask(const MachineInstr &MI, unsigned ShAmtBits) const;