| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 42 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs() 43 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs() 47 MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs() 48 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs() 52 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs() 53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs() 54 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs() 58 MSP430::R5, MSP430::R6, MSP430::R7, in getCalleeSavedRegs() 59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs() 60 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs() [all …]
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| H A D | MSP430FrameLowering.cpp | 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::R4) in emitPrologue() 71 .addReg(MSP430::SP); in emitPrologue() 75 MBBJ.addLiveIn(MSP430::R4); in emitPrologue() 97 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) in emitPrologue() 117 case MSP430::RET: in emitEpilogue() 134 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::R4); in emitEpilogue() 156 TII.get(MSP430::MOV16rr), MSP430::SP).addReg(MSP430::R4); in emitEpilogue() 160 TII.get(MSP430::SUB16ri), MSP430::SP) in emitEpilogue() 169 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SP) in emitEpilogue() 241 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP) in eliminateCallFramePseudoInstr() [all …]
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| H A D | MSP430InstrInfo.cpp | 33 : MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP), in MSP430InstrInfo() 51 if (RC == &MSP430::GR16RegClass) in storeRegToStackSlot() 55 else if (RC == &MSP430::GR8RegClass) in storeRegToStackSlot() 78 if (RC == &MSP430::GR16RegClass) in loadRegFromStackSlot() 82 else if (RC == &MSP430::GR8RegClass) in loadRegFromStackSlot() 96 Opc = MSP430::MOV16rr; in copyPhysReg() 98 Opc = MSP430::MOV8rr; in copyPhysReg() 119 I->getOpcode() != MSP430::Bi && in removeBranch() 121 I->getOpcode() != MSP430::Bm) in removeBranch() 189 I->getOpcode() == MSP430::Bm) in analyzeBranch() [all …]
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| H A D | MSP430ISelDAGToDAG.cpp | 332 Opcode = MSP430::MOV8rp; in tryIndexedLoad() 335 Opcode = MSP430::MOV16rp; in tryIndexedLoad() 408 MSP430::ADD8rp, MSP430::ADD16rp)) in Select() 411 MSP430::ADD8rp, MSP430::ADD16rp)) in Select() 418 MSP430::SUB8rp, MSP430::SUB16rp)) in Select() 425 MSP430::AND8rp, MSP430::AND16rp)) in Select() 428 MSP430::AND8rp, MSP430::AND16rp)) in Select() 435 MSP430::BIS8rp, MSP430::BIS16rp)) in Select() 438 MSP430::BIS8rp, MSP430::BIS16rp)) in Select() 445 MSP430::XOR8rp, MSP430::XOR16rp)) in Select() [all …]
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| H A D | MSP430ISelLowering.cpp | 459 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15 in AnalyzeArguments() 463 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in AnalyzeArguments() 464 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15 in AnalyzeArguments() 1466 BuildMI(*BB, MI, dl, TII.get(MSP430::BIC16rc), MSP430::SR) in EmitShiftInstr() 1471 ? MSP430::RRC16r : MSP430::RRC8r; in EmitShiftInstr() 1530 BuildMI(LoopBB, dl, TII.get(MSP430::BIC16rc), MSP430::SR) in EmitShiftInstr() 1532 if (Opc == MSP430::ADD8rr || Opc == MSP430::ADD16rr) in EmitShiftInstr() 1560 if (Opc == MSP430::Shl8 || Opc == MSP430::Shl16 || in EmitInstrWithCustomInserter() 1561 Opc == MSP430::Sra8 || Opc == MSP430::Sra16 || in EmitInstrWithCustomInserter() 1562 Opc == MSP430::Srl8 || Opc == MSP430::Srl16 || in EmitInstrWithCustomInserter() [all …]
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| H A D | MSP430.td | 1 //===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===// 8 // This is the top level entry point for the MSP430 target. 22 "Enable MSP430-X extensions">; 37 // MSP430 supported processors. 87 def MSP430 : Target {
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| H A D | MSP430RegisterInfo.td | 1 //===-- MSP430RegisterInfo.td - MSP430 Register defs -------*- tablegen -*-===// 10 // Declarations that describe the MSP430 register file 15 let Namespace = "MSP430"; 25 let Namespace = "MSP430"; 52 def subreg_8bit : SubRegIndex<8> { let Namespace = "MSP430"; } 73 def GR8 : RegisterClass<"MSP430", [i8], 8, 81 def GR16 : RegisterClass<"MSP430", [i16], 16,
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| H A D | MSP430CallingConv.td | 1 //==- MSP430CallingConv.td - Calling Conventions for MSP430 -*- tablegen -*-==// 8 // This describes the calling conventions for MSP430 architecture. 12 // MSP430 Return Value Calling Convention 23 // MSP430 Argument Calling Conventions
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| H A D | MSP430BranchSelector.cpp | 124 if (MI->getOpcode() != MSP430::JCC && MI->getOpcode() != MSP430::JMP) { in expandBranches() 146 if (MI->getOpcode() == MSP430::JCC && std::next(MI) != EE) { in expandBranches() 183 if (MI->getOpcode() == MSP430::JCC) { in expandBranches() 196 MI = BuildMI(*MBB, MI, dl, TII->get(MSP430::JCC)) in expandBranches() 204 MI = BuildMI(*MBB, MI, dl, TII->get(MSP430::Bi)).addMBB(DestBB); in expandBranches()
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| H A D | CMakeLists.txt | 1 add_llvm_component_group(MSP430) 3 set(LLVM_TARGET_DEFINITIONS MSP430.td) 42 MSP430
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| H A D | MSP430AsmPrinter.cpp | 115 if (Disp.isImm() && Base.getReg() == MSP430::SR) in printSrcMemOperand() 120 if (Base.getReg() != MSP430::SR && Base.getReg() != MSP430::PC) { in printSrcMemOperand()
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| H A D | MSP430InstrFormats.td | 1 //===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===// 10 // Describe MSP430 instructions format here 31 // Generic MSP430 Format 36 let Namespace = "MSP430"; 45 // MSP430 Double Operand (Format I) Instructions 316 // MSP430 Single Operand (Format II) Instructions 423 // MSP430 Conditional Jumps Instructions
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 67 MSP430::PCB, MSP430::SPB, MSP430::SRB, MSP430::CGB, 68 MSP430::R4B, MSP430::R5B, MSP430::R6B, MSP430::R7B, 69 MSP430::R8B, MSP430::R9B, MSP430::R10B, MSP430::R11B, 70 MSP430::R12B, MSP430::R13B, MSP430::R14B, MSP430::R15B 85 MSP430::PC, MSP430::SP, MSP430::SR, MSP430::CG, 86 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7, 87 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, 88 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15 350 MI.setOpcode(MSP430::JMP); in getInstructionCJ() 352 MI.setOpcode(MSP430::JCC); in getInstructionCJ()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430ELFObjectWriter.cpp | 37 case MSP430::fixup_32: return ELF::R_MSP430_32; in getRelocType() 38 case MSP430::fixup_10_pcrel: return ELF::R_MSP430_10_PCREL; in getRelocType() 39 case MSP430::fixup_16: return ELF::R_MSP430_16; in getRelocType() 40 case MSP430::fixup_16_pcrel: return ELF::R_MSP430_16_PCREL; in getRelocType() 41 case MSP430::fixup_16_byte: return ELF::R_MSP430_16_BYTE; in getRelocType() 42 case MSP430::fixup_16_pcrel_byte: return ELF::R_MSP430_16_PCREL_BYTE; in getRelocType() 43 case MSP430::fixup_2x_pcrel: return ELF::R_MSP430_2X_PCREL; in getRelocType() 44 case MSP430::fixup_rl_pcrel: return ELF::R_MSP430_RL_PCREL; in getRelocType() 45 case MSP430::fixup_8: return ELF::R_MSP430_8; in getRelocType() 46 case MSP430::fixup_sym_diff: return ELF::R_MSP430_SYM_DIFF; in getRelocType()
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| H A D | MSP430MCCodeEmitter.cpp | 115 static_cast<MCFixupKind>(MSP430::fixup_16_byte), MI.getLoc())); in getMachineOpValue() 134 MSP430::Fixups FixupKind; in getMemOpValue() 137 FixupKind = MSP430::fixup_16_pcrel_byte; in getMemOpValue() 140 FixupKind = MSP430::fixup_16_byte; in getMemOpValue() 143 FixupKind = MSP430::fixup_16_byte; in getMemOpValue() 161 static_cast<MCFixupKind>(MSP430::fixup_10_pcrel), MI.getLoc())); in getPCRelImmOpValue()
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| H A D | MSP430AsmBackend.cpp | 65 return MSP430::NumTargetFixupKinds; in getNumFixupKinds() 69 const static MCFixupKindInfo Infos[MSP430::NumTargetFixupKinds] = { in getFixupKindInfo() 84 static_assert((array_lengthof(Infos)) == MSP430::NumTargetFixupKinds, in getFixupKindInfo() 102 case MSP430::fixup_10_pcrel: { in adjustFixupValue()
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| H A D | MSP430FixupKinds.h | 14 #undef MSP430 17 namespace MSP430 {
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| H A D | MSP430InstPrinter.cpp | 81 if (Base.getReg() == MSP430::SR) in printSrcMemOperand() 92 if ((Base.getReg() != MSP430::SR) && in printSrcMemOperand() 93 (Base.getReg() != MSP430::PC)) in printSrcMemOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 562 case MSP430::PC: return MSP430::PCB; in convertGR16ToGR8() 563 case MSP430::SP: return MSP430::SPB; in convertGR16ToGR8() 564 case MSP430::SR: return MSP430::SRB; in convertGR16ToGR8() 565 case MSP430::CG: return MSP430::CGB; in convertGR16ToGR8() 566 case MSP430::R4: return MSP430::R4B; in convertGR16ToGR8() 567 case MSP430::R5: return MSP430::R5B; in convertGR16ToGR8() 568 case MSP430::R6: return MSP430::R6B; in convertGR16ToGR8() 569 case MSP430::R7: return MSP430::R7B; in convertGR16ToGR8() 570 case MSP430::R8: return MSP430::R8B; in convertGR16ToGR8() 571 case MSP430::R9: return MSP430::R9B; in convertGR16ToGR8() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/MSP430/ |
| H A D | build-attrs.ll | 4 ; RUN: | llvm-readelf -A - | FileCheck %s --check-prefixes COMMON,MSP430,SMALL 6 ; RUN: | llvm-readelf -A - | FileCheck %s --check-prefixes COMMON,MSP430,SMALL 8 ; RUN: | llvm-readelf -A - | FileCheck %s --check-prefixes COMMON,MSP430,SMALL 19 ; MSP430: Tag: 4 20 ; MSP430-NEXT: Value: 1 21 ; MSP430-NEXT: TagName: ISA 22 ; MSP430-NEXT: Description: MSP430
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| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | MSP430.cpp | 32 class MSP430 final : public TargetInfo { class 34 MSP430(); 42 MSP430::MSP430() { in MSP430() function in MSP430 47 RelExpr MSP430::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 62 void MSP430::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { in relocate() 92 static MSP430 target; in getMSP430TargetInfo()
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| /llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/MSP430/ |
| H A D | build-attributes.test | 31 # MSP430: Tag: 4 32 # MSP430-NEXT: Value: 1 33 # MSP430-NEXT: TagName: ISA 34 # MSP430-NEXT: Description: MSP430 81 ## MSP430 ISA 92 - Name: .MSP430.attributes 110 - Name: .MSP430.attributes 127 - Name: .MSP430.attributes 144 - Name: .MSP430.attributes 161 - Name: .MSP430.attributes [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | consecutive-fences.ll | 24 ; CHECK-NEXT: fence syncscope("MSP430") acquire 27 fence syncscope("MSP430") acquire 28 fence syncscope("MSP430") acquire
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/TargetInfo/ |
| H A D | CMakeLists.txt | 9 MSP430
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| /llvm-project-15.0.7/llvm/test/MC/MSP430/ |
| H A D | lit.local.cfg | 1 if not 'MSP430' in config.root.targets:
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