| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrControl.td | 236 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst), 244 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst), 256 def CALL16m_NT : I<0xFF, MRM2m, (outs), (ins i16mem : $dst), 263 def CALL32m_NT : I<0xFF, MRM2m, (outs), (ins i32mem : $dst), 342 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst), 352 def CALL64m_NT : I<0xFF, MRM2m, (outs), (ins i64mem : $dst),
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| H A D | X86InstrShiftRotate.td | 395 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst), 397 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt), 399 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst), 401 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt), 403 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst), 405 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt), 407 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst), 433 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst), 435 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst), 437 def RCL32mCL : I<0xD3, MRM2m, (outs), (ins i32mem:$dst), [all …]
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| H A D | X86InstrKL.td | 77 def AESENCWIDE256KL : I<0xD8, MRM2m, (outs), (ins opaquemem:$src),
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| H A D | X86InstrFPStack.td | 391 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">; 394 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">; 397 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; 400 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">; 572 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">; 573 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">; 577 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">; 578 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">;
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| H A D | X86Instr3DNow.td | 102 def PREFETCHWT1 : I<0x0D, MRM2m, (outs), (ins i8mem:$addr), "prefetchwt1\t$addr",
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| H A D | X86InstrSystem.td | 404 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 406 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 408 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 419 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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| H A D | X86InstrArithmetic.td | 410 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst), 413 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst), 417 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst), 421 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst", 1217 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
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| H A D | X86InstrFormats.td | 41 def MRM0m : Format<32>; def MRM1m : Format<33>; def MRM2m : Format<34>;
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| H A D | X86InstrInfo.td | 2512 defm BLSMSK32 : bmi_bls<"blsmsk{l}", MRM2r, MRM2m, GR32, i32mem, WriteBLS>; 2513 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem, WriteBLS>, VEX_W; 2743 defm BLSFILL : tbm_binary_intr<0x01, "blsfill", WriteALU, MRM2r, MRM2m>;
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| H A D | X86InstrAVX512.td | 6236 defm VPSRL : avx512_shift_rmi_dq<0x72, 0x73, MRM2r, MRM2m, "vpsrl", X86vsrli, 6238 avx512_shift_rmi_w<0x71, MRM2r, MRM2m, "vpsrlw", X86vsrli, 10498 defm VGATHERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dps", 10501 defm VGATHERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qps", 10504 defm VGATHERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dpd", 10507 defm VGATHERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qpd",
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| H A D | X86InstrSSE.td | 3205 def PREFETCHT1 : I<0x18, MRM2m, (outs), (ins i8mem:$src), 3247 def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src), 3256 def LDMXCSR : I<0xAE, MRM2m, (outs), (ins i32mem:$src),
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.h | 118 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, enumerator
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| H A D | X86RecognizableInstr.cpp | 712 case X86Local::MRM2m: in emitInstructionSpecifier() 837 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
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| H A D | X86FoldTablesEmitter.cpp | 368 (MemForm == X86Local::MRM2m && RegForm == X86Local::MRM2r) || in areOppositeForms()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 684 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, // Format /0 /1 /2 /3 enumerator 1152 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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| H A D | X86MCCodeEmitter.cpp | 904 case X86II::MRM2m: in emitVEXOpcodePrefix() 1192 case X86II::MRM2m: in emitREXPrefix() 1612 case X86II::MRM2m: in encodeInstruction()
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | TargetInstrInfo.td | 55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/X86/ |
| H A D | Target.cpp | 177 case X86II::MRM2m: in isInvalidMemoryInstr()
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1877 case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and
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| /llvm-project-15.0.7/llvm/docs/TableGen/ |
| H A D | ProgRef.rst | 872 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
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