| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | store-private.ll | 10 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+, 15 ; CM: MOV {{[\* ]*}}T(0 + AR.x).X+, 45 ; EG: MOV * T(0 + AR.x).X+, [[RES]] 74 ; EG: MOV * T(0 + AR.x).X+, [[RES]] 91 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+, 96 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+, 101 ; CM: MOV {{[\* ]*}}T(0 + AR.x).X+, 106 ; CM: MOV {{[\* ]*}}T(0 + AR.x).X+, 119 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+, 123 ; CM: MOV {{[\* ]*}}T(0 + AR.x).X+, [all …]
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| H A D | r600.global_atomics.ll | 8 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 18 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 29 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 40 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 51 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 60 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 70 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 80 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 91 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z 100 ; EG: MOV{{[ *]*}}[[REG]].X, KC0[2].Z [all …]
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| H A D | kernel-args.ll | 55 ; EG-NEXT: MOV * T0.X, 0.0, 71 ; CM-NEXT: MOV * T0.X, 0.0, 127 ; EG-NEXT: MOV * T0.X, 0.0, 144 ; CM-NEXT: MOV * T0.X, 0.0, 202 ; EG-NEXT: MOV * T0.X, 0.0, 219 ; CM-NEXT: MOV * T0.X, 0.0, 629 ; EG-NEXT: MOV T4.Y, 0.0, 660 ; CM-NEXT: MOV T4.Y, 0.0, 947 ; EG-NEXT: MOV T4.Y, 0.0, 958 ; EG-NEXT: MOV T5.Y, 0.0, [all …]
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| H A D | build_vector.ll | 8 ; R600: MOV 9 ; R600: MOV 10 ; R600-NOT: MOV 25 ; R600: MOV 26 ; R600: MOV 27 ; R600: MOV 28 ; R600: MOV 29 ; R600-NOT: MOV 49 ; R600: MOV 50 ; R600-NOT: MOV [all …]
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| H A D | r600-legalize-umax-bug.ll | 15 ; CHECK-NEXT: MOV T0.X, literal.x, 16 ; CHECK-NEXT: MOV T0.Y, 0.0, 19 ; CHECK-NEXT: MOV * T0.W, KC0[2].Y, 21 ; CHECK-NEXT: MOV T0.X, literal.x, 22 ; CHECK-NEXT: MOV T0.Y, 0.0,
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| H A D | image-resource-id.ll | 7 ; EG: MOV [[VAL]], literal.x 21 ; EG: MOV [[VAL]], literal.x 37 ; EG: MOV [[VAL]], literal.x 51 ; EG: MOV [[VAL]], literal.x 67 ; EG: MOV [[VAL]], literal.x 82 ; EG: MOV [[VAL]], literal.x 97 ; EG: MOV [[VAL]], literal.x 112 ; EG: MOV [[VAL]], literal.x 129 ; EG: MOV [[VAL]], literal.x 144 ; EG: MOV [[VAL]], literal.x [all …]
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| H A D | ctpop16.ll | 52 ; EG-NEXT: MOV * T0.X, 0.0, 62 ; EG-NEXT: MOV T0.Y, 0.0, 63 ; EG-NEXT: MOV * T0.Z, 0.0, 130 ; EG-NEXT: MOV T0.Y, 0.0, 131 ; EG-NEXT: MOV * T0.Z, 0.0, 223 ; EG-NEXT: MOV T0.Y, 0.0, 224 ; EG-NEXT: MOV * T0.Z, 0.0, 307 ; EG-NEXT: MOV T0.Y, 0.0, 473 ; EG-NEXT: MOV T2.X, T0.X, 475 ; EG-NEXT: MOV T0.X, T4.X, [all …]
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| H A D | image-attributes.ll | 9 ; EG: MOV * [[VAL]], KC0[2].Z 22 ; EG: MOV * [[VAL]], KC0[2].Z 39 ; EG: MOV * [[VAL]], KC0[2].W 52 ; EG: MOV * [[VAL]], KC0[2].W 69 ; EG: MOV * [[VAL]], KC0[3].X 86 ; EG: MOV * [[VAL]], KC0[3].Y 99 ; EG: MOV * [[VAL]], KC0[3].Y 116 ; EG: MOV * [[VAL]], KC0[3].Z 129 ; EG: MOV * [[VAL]], KC0[3].Z 148 ; EG: MOV * [[VAL]], KC0[4].Z
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| H A D | r600.bitcast.ll | 18 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 41 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 63 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 85 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 107 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 129 ; EG-NEXT: MOV * T0.X, KC0[2].Z, 155 ; EG-NEXT: MOV * T5.X, KC0[2].Z, 160 ; EG-NEXT: MOV * T3.X, PV.W, 161 ; EG-NEXT: MOV T0.Y, PV.X, 171 ; EG-NEXT: MOV T5.Y, 0.0, [all …]
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| H A D | amdgpu.work-item-intrinsics.deprecated.ll | 18 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].X 33 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].Y 48 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].Z 63 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].W 78 ; EG: MOV {{\*? *}}[[VAL]], KC0[1].X 93 ; EG: MOV {{\*? *}}[[VAL]], KC0[1].Y 108 ; EG: MOV {{\*? *}}[[VAL]], KC0[1].Z 123 ; EG: MOV {{\*? *}}[[VAL]], KC0[1].W 138 ; EG: MOV {{\*? *}}[[VAL]], KC0[2].X
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| H A D | load-local-i16.ll | 16 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 18 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 19 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 34 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 36 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 37 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y 126 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 128 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP 146 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z 148 ; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP [all …]
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| H A D | literals.ll | 39 ; CHECK: MOV {{\** *}}T[[GPR:[0-9]]].X, 0.0 40 ; CHECK-NEXT: MOV {{\** *}}T[[GPR]].Y, 0.0 41 ; CHECK-NEXT: MOV {{\** *}}T[[GPR]].Z, 0.0 42 ; CHECK-NEXT: MOV {{\** *}}T[[GPR]].W, 0.0
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| H A D | lds-output-queue.ll | 9 ; CHECK: MOV * T{{[0-9]\.[XYZW]}}, OQAP 49 ; %0 = MOV %oqap 61 ; %0 = MOV %oqap 74 ; %0 = MOV %oqap 82 ; LDS_READ_RET and MOV together during instruction selection and then 90 ; CHECK: MOV * T{{[0-9]\.[XYZW]}}, OQAP
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| H A D | bfi_int.r600.ll | 137 ; R600-NEXT: MOV * T0.W, KC0[3].Y, 139 ; R600-NEXT: MOV * T1.W, KC0[3].Z, 145 ; R600-NEXT: MOV * T1.X, literal.y, 164 ; R600-NEXT: MOV * T0.W, KC0[3].Y, 166 ; R600-NEXT: MOV * T1.W, KC0[3].Z, 172 ; R600-NEXT: MOV * T1.X, literal.y, 191 ; R600-NEXT: MOV * T0.W, KC0[3].Y, 193 ; R600-NEXT: MOV * T1.W, KC0[3].Z, 199 ; R600-NEXT: MOV * T1.X, literal.y, 226 ; R600-NEXT: MOV * T1.X, literal.y,
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| H A D | r600.work-item-intrinsics.ll | 15 ; EG: MOV [[REG]].X, T1.Y 25 ; EG: MOV [[REG]].X, T1.Z 44 ; EG: MOV [[REG]].X, T0.Y 54 ; EG: MOV [[REG]].X, T0.Z 66 ; EG-DAG: MOV {{\*?}} [[VAL]], KC0[3].Z
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| H A D | r600-export-fix.ll | 27 ; CHECK-NEXT: MOV T2.Y, KC0[2].Z, 30 ; CHECK-NEXT: MOV T2.X, KC0[2].Y, 35 ; CHECK-NEXT: MOV * T3.W, KC0[2].X, 36 ; CHECK-NEXT: MOV T3.Z, KC0[3].Z, 38 ; CHECK-NEXT: MOV * T4.W, KC0[0].Z, 39 ; CHECK-NEXT: MOV T3.Y, KC0[3].Y, 40 ; CHECK-NEXT: MOV * T4.Z, KC0[0].Y, 42 ; CHECK-NEXT: MOV T3.X, KC0[3].X, 43 ; CHECK-NEXT: MOV * T4.Y, KC0[0].X,
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| H A D | fminnum.r600.ll | 81 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 91 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 102 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 112 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 122 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 132 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 142 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 152 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}}
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| H A D | fmaxnum.r600.ll | 81 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 91 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 102 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 112 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 122 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 132 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 142 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}} 152 ; EG: MOV {{.*}}[[OUT]], literal.{{[xy]}}
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| H A D | vector-alloca.ll | 15 ; EG: MOV 16 ; EG: MOV 17 ; EG: MOV 18 ; EG: MOV 43 ; EG: MOV 44 ; EG: MOV 45 ; EG: MOV 46 ; EG: MOV
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| H A D | sampler-resource-id.ll | 5 ; EG: MOV [[VAL]], literal.x 17 ; EG: MOV [[VAL]], literal.x 29 ; EG: MOV [[VAL]], literal.x
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| /llvm-project-15.0.7/llvm/test/TableGen/GICombinerEmitter/ |
| H A D | parse-match-pattern.td | 28 (match (MOV $d, $s)), 52 (match (MOV $t, $s), 53 (MOV $d, $t)), 81 (match (MOV $s, $s2), 82 (MOV $d1, $s), 83 (MOV $d2, $s)), 125 (match (MOV $s, $s2), 126 (MOV $d1, $s), 127 (MOV $d2, $s)), 169 (match (MOV $d1, $s), [all …]
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| H A D | match-invalid.td | 22 def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1), []>; 58 (match (MOV $a, $b), 59 (MOV $a, $b)), 67 (match (MOV $a, $b), 68 (MOV $a, $b)),
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| /llvm-project-15.0.7/llvm/test/tools/llvm-ml/ |
| H A D | align_directives.asm | 64 MOV eax, align_struct.x 65 MOV eax, align_struct.x_succ 71 MOV eax, align_struct.y 78 MOV eax, align_struct.z 83 MOV eax, align_struct.q 99 MOV eax, org_struct.x 100 MOV eax, org_struct.x_succ 101 MOV eax, org_struct.y 102 MOV eax, org_struct.y_succ 103 MOV eax, org_struct.z [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | patchable-prologue.ll | 4 …hineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=32,MOV 5 …w-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=32,MOV 26 ; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff] 48 ; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff] 70 ; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff] 94 ; MOV-NEXT: movl %edi, %edi 114 ; MOV-NEXT: movl %edi, %edi
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrData.td | 123 def MOV # TYPE.Size # DST_REG # SRC_REG # TYPE.Postfix 130 def MOV # TYPE.Size # dd # TYPE.Postfix 151 def MOV # TYPE.Size # AM # REG # TYPE.Postfix 160 def MOV # TYPE.Size # AM # i # TYPE.Postfix 176 def MOV # TYPE.Size # REG # i # TYPE.Postfix 196 def MOV # TYPE.Size # REG # AM # TYPE.Postfix 206 def MOV # TYPE.Size # REG # AM # _TC 225 def MOV # TYPE.Size # DST_AM # SRC_AM # TYPE.Postfix 481 def MOV#EXT#Xd16d8 : MxPseudoMove_RR<MxType16d, MxType8d>; 482 def MOV#EXT#Xd32d8 : MxPseudoMove_RR<MxType32d, MxType8d>; [all …]
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