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/llvm-project-15.0.7/llvm/test/CodeGen/Mips/longbranch/
H A Dbranch-limits-int-microMIPS.mir141 ; MM: }
229 ; MM: }
234 ; MM: }
324 ; MM: }
329 ; MM: }
419 ; MM: }
424 ; MM: }
514 ; MM: }
519 ; MM: }
612 ; MM: }
[all …]
H A Dbranch-limits-fp-micromips.mir71 ; MM-LABEL: name: a
72 ; MM: bb.0.entry:
77 ; MM: }
78 ; MM: bb.1.entry:
82 ; MM: }
83 ; MM: bb.2.if.then:
87 ; MM: bb.3.return:
171 ; MM-LABEL: name: b
172 ; MM: bb.0.entry:
177 ; MM: }
[all …]
H A Dbranch-limits-fp-micromipsr6.mir71 ; MM-LABEL: name: a
72 ; MM: bb.0.entry:
76 ; MM: bb.1.entry:
78 ; MM: BC_MMR6 %bb.3
79 ; MM: bb.2.if.then:
83 ; MM: bb.3.return:
163 ; MM-LABEL: name: b
164 ; MM: bb.0.entry:
168 ; MM: bb.1.entry:
171 ; MM: bb.2.if.then:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dblez_bgez.ll44 ; MM-LABEL: test_blez:
47 ; MM-NEXT: nop
49 ; MM-NEXT: j $BB0_2
50 ; MM-NEXT: nop
56 ; MM-NEXT: jal foo1
57 ; MM-NEXT: nop
61 ; MM-NEXT: jrc $ra
117 ; MM-NEXT: nop
120 ; MM-NEXT: nop
129 ; MM-NEXT: nop
[all …]
H A Dmcount.ll86 ; MIPS32-MM-LABEL: foo:
87 ; MIPS32-MM: # %bb.0: # %entry
92 ; MIPS32-MM-NEXT: move $1, $ra
93 ; MIPS32-MM-NEXT: jal _mcount
96 ; MIPS32-MM-NEXT: jr $ra
99 ; MIPS32-MM-PIC-LABEL: foo:
109 ; MIPS32-MM-PIC-NEXT: move $gp, $2
110 ; MIPS32-MM-PIC-NEXT: move $1, $ra
112 ; MIPS32-MM-PIC-NEXT: $tmp0:
113 ; MIPS32-MM-PIC-NEXT: jalr $25
[all …]
H A Dmno-ldc1-sdc1.ll25 ; RUN: FileCheck %s -check-prefixes=ALL,MM-MNO-PIC,MM-MNO-LE-PIC
28 ; RUN: FileCheck %s -check-prefixes=ALL,MM-MNO-PIC,MM-MNO-LE-PIC
42 ; RUN: FileCheck %s -check-prefixes=ALL,MM-MNO-PIC,MM-MNO-BE-PIC
45 ; RUN: FileCheck %s -check-prefixes=ALL,MM-MNO-PIC,MM-MNO-BE-PIC
135 ; MM-MNO-LE-PIC-DAG: mtc1 $[[R4]], $f0
266 ; MM: ldc1 $f0, 0($[[R1]])
272 ; MM-MNO-LE-PIC: mtc1 $[[R2]], $f0
273 ; MM-MNO-LE-PIC: mthc1 $[[R3]], $f0
274 ; MM-MNO-BE-PIC: mtc1 $[[R3]], $f0
275 ; MM-MNO-BE-PIC: mthc1 $[[R2]], $f0
[all …]
H A Dtglobaladdr-wrapper.ll29 ; MM-LABEL: foo:
30 ; MM: # %bb.0: # %entry
31 ; MM-NEXT: lui $2, %hi(_gp_disp)
33 ; MM-NEXT: addu $2, $2, $25
34 ; MM-NEXT: lw $3, %got(x)($2)
35 ; MM-NEXT: lw16 $4, 0($3)
38 ; MM-NEXT: movz $5, $1, $4
39 ; MM-NEXT: lw16 $2, 0($5)
40 ; MM-NEXT: lw16 $2, 0($2)
41 ; MM-NEXT: sw16 $2, 0($3)
[all …]
H A Dtls.ll30 ; MM-LABEL: f1:
32 ; MM-DAG: addiu $4, $[[R0]], %tlsgd(t1)
34 ; MM-DAG: move $gp, $2
35 ; MM-DAG: jalr $25
36 ; MM-DAG: lw16 $2, 0($2)
60 ; MM-LABEL: f2:
63 ; MM-DAG: addiu $4, $[[R0]], %tlsgd(t2)
64 ; MM-DAG: jalr $25
65 ; MM-DAG: lw16 $2, 0($2)
96 ; MM-LABEL: f3:
[all …]
H A Dbswap.ll16 ; MM-LABEL: bswap32:
17 ; MM: wsbh $[[R0:[0-9]+]]
18 ; MM: rotr ${{[0-9]+}}, $[[R0]], 16
49 ; MM-LABEL: bswap64:
50 ; MM: wsbh $[[R0:[0-9]+]]
52 ; MM: wsbh $[[R0:[0-9]+]]
97 ; MM-LABEL: bswapv4i32:
98 ; MM-DAG: wsbh $[[R0:[0-9]+]]
100 ; MM-DAG: wsbh $[[R0:[0-9]+]]
102 ; MM-DAG: wsbh $[[R0:[0-9]+]]
[all …]
H A Datomic-min-max.ll51 ; MM-NEXT: sync
61 ; MM-NEXT: sync
62 ; MM-NEXT: jrc $ra
254 ; MM-NEXT: sync
264 ; MM-NEXT: sync
457 ; MM-NEXT: sync
467 ; MM-NEXT: sync
660 ; MM-NEXT: sync
670 ; MM-NEXT: sync
912 ; MM-NEXT: sync
[all …]
H A Daddress-selection.ll5 ; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
7 ; RUN: -debug 2>&1 | FileCheck %s --check-prefix=MM-XGOT
33 ; MM-LABEL: ===== Instruction selection ends:
34 ; MM: t[[A:[0-9]+]]: i32 = LUi_MM TargetGlobalAddress:i32<i32* @x> 0 [TF=4]
35 ; MM: t{{.*}}: i32 = ADDiu_MM t[[A]], TargetGlobalAddress:i32<i32* @x> 0 [TF=5]
37 ; MM-XGOT-LABEL: ===== Instruction selection ends:
38 ; MM-XGOT: t[[B:[0-9]+]]: i32 = LUi_MM TargetGlobalAddress:i32<i32* @x> 0 [TF=20]
39 ; MM-XGOT: t[[C:[0-9]+]]: i32 = ADDU16_MM t[[B]], Register:i32 %0
40 ; MM-XGOT: t{{.*}}: i32,ch = LW_MM<Mem:(load (s32) from got)> t[[C]], TargetGlobalAddress:i32<i32* …
H A Ddsp-spill-reload.ll4 ; RUN: llvm-objdump -d - | FileCheck %s --check-prefixes=MM-OBJ,ALL
27 ; MM-OBJ: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
28 ; MM-OBJ: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
35 ; MM-OBJ: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
44 ; MM-OBJ: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
45 ; MM-OBJ: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
H A Dmicromips-directives.ll5 ; RUN: FileCheck %s -check-prefix=CHECK-MM
7 ; RUN: FileCheck %s -check-prefix=CHECK-NO-MM
14 ; CHECK-MM: .set micromips
15 ; CHECK-NO-MM: .set nomicromips
H A Dtls-static.ll71 ; MM-LABEL: f3:
72 ; MM: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
73 ; MM: jalr $25
74 ; MM: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
75 ; MM: addu16 $[[R1:[0-9]+]], $[[R0]], $2
76 ; MM: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
H A Dreloc-jalr.ll27 ; RUN: FileCheck %s -check-prefixes=ALL,JALR-ALL,JALR-MM,TAILCALL-MM
31 ; RUN: FileCheck %s -check-prefixes=ALL,JALR-ALL,JALR-MM,TAILCALL-MM
57 ; RUN: FileCheck %s -check-prefixes=ALL,JALR-ALL,JALR-MM,PIC-NOTAILCALL-MM
61 ; RUN: FileCheck %s -check-prefixes=ALL,JALR-ALL,JALR-MM,PIC-NOTAILCALL-MM
107 ; JALR-MM: .reloc ([[TMPLABEL:\$.+]]), R_MICROMIPS_JALR, foo
114 ; JALR-MM-NEXT: jalr $25
126 ; JALR-MM: .reloc ([[TMPLABEL:\$.+]]), R_MICROMIPS_JALR, foo
131 ; TAILCALL-MM-NEXT: jrc $25
136 ; PIC-NOTAILCALL-MM-NEXT: jalr $25
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dexpr1.s4 # RUN: FileCheck %s --check-prefix=MM-32R2-EL
29 # MM-32R2-EL: .text
30 # MM-32R2-EL: .globl foo
31 # MM-32R2-EL: foo:
34 # MM-32R2-EL: lw $4, 56($4) # encoding: [0x84,0xfc,0x38,0x00]
44 # MM-32R2-EL: lw $4, 10($4) # encoding: [0x84,0xfc,0x0a,0x00]
45 # MM-32R2-EL: lw $4, 15($4) # encoding: [0x84,0xfc,0x0f,0x00]
46 # MM-32R2-EL: lw $4, 21($4) # encoding: [0x84,0xfc,0x15,0x00]
47 # MM-32R2-EL: lw $4, 28($4) # encoding: [0x84,0xfc,0x1c,0x00]
48 # MM-32R2-EL: lw $4, 6($4) # encoding: [0x84,0xfc,0x06,0x00]
[all …]
H A Dexpansion-jal-sym-pic.s20 # RUN: FileCheck %s -check-prefixes=ALL,MM,O32-MM
123 # MM: jalr $ra, $25 # encoding: [0x03,0xf9,0x0f,0x3c]
203 # O32-MM-NOT: .reloc
206 # MM: jalr $ra, $25 # encoding: [0x03,0xf9,0x0f,0x3c]
290 # MM: jalr $ra, $25 # encoding: [0x03,0xf9,0x0f,0x3c]
383 # O32-MM-NOT: .reloc
386 # MM: jalr $ra, $25 # encoding: [0x03,0xf9,0x0f,0x3c]
563 # O32-MM-NOT: .reloc
626 # O42-MM-NEXT: .reloc ($tmp3), R_MICROMIPS_JALR, .text
692 # O42-MM-NEXT: .reloc ($tmp4), R_MICROMIPS_JALR, .text
[all …]
H A Dj-macro-insn.s6 # RUN: | FileCheck --check-prefix=STATIC-MM %s
9 # RUN: | FileCheck --check-prefix=PIC-MM %s
21 # PIC-MM: b foo # <MCInst #{{[0-9]+}} BEQ_MM
22 # STATIC-MM: j foo # <MCInst #{{[0-9]+}} J_MM
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/llvm-ir/
H A Dnan-fp-attr.ll77 ; MM-LABEL: foo:
79 ; MM-NEXT: jr $ra
82 ; MM-ABS2K8-LABEL: foo:
160 ; MM-LABEL: bar:
167 ; MM-NEXT: jrc $ra
169 ; MM-ABS2K8-LABEL: bar:
229 ; MM-LABEL: foo_2:
231 ; MM-NEXT: jr $ra
234 ; MM-ABS2K8-LABEL: foo_2:
306 ; MM-LABEL: bar_2:
[all …]
H A Dsub.ll2 ; RUN: -check-prefixes=NOT-R2-R6,GP32,NOT-MM,PRE4
4 ; RUN: -check-prefixes=NOT-R2-R6,GP32,NOT-MM
6 ; RUN: -check-prefixes=R2-R6,GP32,NOT-MM
8 ; RUN: -check-prefixes=R2-R6,GP32,NOT-MM
10 ; RUN: -check-prefixes=R2-R6,GP32,NOT-MM
12 ; RUN: -check-prefixes=R2-R6,GP32,NOT-MM
38 ; NOT-MM: negu $2, $[[T0]]
61 ; MM: seb $[[T0]], $[[T0]]
79 ; MM: seh $[[T0]], $[[T0]]
89 ; NOT-MM: subu $2, $4, $5
[all …]
H A Darith-fp.ll3 …ch=mips -mcpu=mips32r3 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MM
10 ; MM: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D32_MM
20 ; MM: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D32_MM
30 ; MM: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D32_MM
40 ; MM: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D32_MM
50 ; MM: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D32_MM
H A Dtrap.ll3 …riple=mips-mti-linux-gnu -mattr=+micromips < %s --show-mc-encoding | FileCheck %s --check-prefix=MM
14 ; MM-LABEL: test:
15 ; MM: # %bb.0: # %entry
16 ; MM-NEXT: break # encoding: [0x00,0x00,0x00,0x07]
17 ; MM-NEXT: jrc $ra # encoding: [0x45,0xbf]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/cstmaterialization/
H A Disel-materialization.ll2 ; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
29 ; MM-LABEL: ===== Instruction selection ends:
30 ; MM-DAG: t{{[0-9]+}}: i32 = LI16_MM TargetConstant:i32<1>
31 ; MM-DAG: t{{[0-9]+}}: i32 = ADDiu_MM Register:i32 $zero, TargetConstant:i32<2048>
32 ; MM-DAG: t{{[0-9]+}}: i32 = LUi_MM TargetConstant:i32<128>
33 ; MM: t{{[0-9]+}}: ch,glue = JAL_MM TargetGlobalAddress:i32<ptr @f>
35 ; MM: t[[A:[0-9]+]]: i32 = LUi_MM TargetConstant:i32<2304>
36 ; MM: t{{[0-9]+}}: i32 = ORi_MM t[[A]], TargetConstant:i32<2>
H A DconstMaterialization.ll2 ; RUN: llc -march=mips < %s -mattr=+micromips | FileCheck %s -check-prefixes=ALL,MM
11 ; MM: li16 $2, -1
15 ; MM-NOT: addiu
24 ; MM: li16 $2, 126
27 ; MM-NOT: addiu
49 ; MM: li16 $2, 0
53 ; MM-NOT: addiu
/llvm-project-15.0.7/llvm/unittests/ExecutionEngine/MCJIT/
H A DMCJITCAPITest.cpp438 TestReserveAllocationSpaceMemoryManager* MM = new TestReserveAllocationSpaceMemoryManager(); in TEST_F() local
442 Options.MCJMM = wrap(MM); in TEST_F()
454 EXPECT_LE(MM->UsedCodeSize, MM->ReservedCodeSize); in TEST_F()
455 EXPECT_LE(MM->UsedDataSizeRO, MM->ReservedDataSizeRO); in TEST_F()
456 EXPECT_LE(MM->UsedDataSizeRW, MM->ReservedDataSizeRW); in TEST_F()
457 EXPECT_TRUE(MM->UsedCodeSize > 0); in TEST_F()
458 EXPECT_TRUE(MM->UsedDataSizeRW > 0); in TEST_F()

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