Searched refs:MFMA (Results 1 – 10 of 10) sorted by relevance
2281 MFMA = &MI; in checkMAIVALUHazards()2338 MFMA = nullptr; in checkMAIVALUHazards()2341 if (!MFMA) in checkMAIVALUHazards()2350 ? isXDL(ST, *MFMA) in checkMAIVALUHazards()2440 MFMA = nullptr; in checkMAIVALUHazards()2443 if (MFMA) { in checkMAIVALUHazards()2448 ? isXDL(ST, *MFMA) in checkMAIVALUHazards()2463 ? isXDL(ST, *MFMA) in checkMAIVALUHazards()2501 MFMA = &MI; in checkMAIVALUHazards()2505 MFMA = nullptr; in checkMAIVALUHazards()[all …]
216 MFMA = 1u << 3, enumerator351 if ((SBMask & SchedBarrierMasks::MFMA) == SchedBarrierMasks::NONE && in getSchedGroupsFromMask()
119 def HWXDL : ProcResource<1> { // MFMA CU
134 // This bit indicates that this is one of MFMA instructions.
195 "MFMA cannot use inline literal as SrcC"
7 ; Check that Dst and SrcC of MFMA instructions reading more than 4 registers as SrcC
202 # MASK = 0x0000 0008: MFMA instructions may be scheduled across SCHED_BARRIER.442 # MASK = 0x0000 0008: MFMA instructions may be scheduled across SCHED_BARRIER.443 # MASK = 0x0000 000C: MFMA and SALU may be scheduled across SCHED_BARRIER.
306 // MFMA builtins.
233 // MASK = 0x0000 0008: MFMA instructions may be scheduled across SCHED_BARRIER.2287 // Note: in gfx940 BLGP argument is replaced by NEG bitfield in the DGEMM MFMA.
2005 VOP3P MFMA Modifiers