2275   const MachineInstr *MFMA = nullptr;  in checkMAIVALUHazards()  local
2277   auto IsMFMAWriteFn = [&Reg, &MFMA, this](const MachineInstr &MI) {  in checkMAIVALUHazards()
2281     MFMA = &MI;  in checkMAIVALUHazards()
2338       MFMA = nullptr;  in checkMAIVALUHazards()
2341       if (!MFMA)  in checkMAIVALUHazards()
2344       unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA);  in checkMAIVALUHazards()
2350             ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2356         assert(isDGEMM(MFMA->getOpcode()) || ST.hasGFX940Insts());  in checkMAIVALUHazards()
2358           isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2361             : isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2368             ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2376           isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2380               ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2440     MFMA = nullptr;  in checkMAIVALUHazards()
2443     if (MFMA) {  in checkMAIVALUHazards()
2445       switch (TSchedModel.computeInstrLatency(MFMA)) {  in checkMAIVALUHazards()
2448           ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2454         assert(isDGEMM(MFMA->getOpcode()) || ST.hasGFX940Insts());  in checkMAIVALUHazards()
2455         NeedWaitStates = isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2457             : isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2463           ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2470         NeedWaitStates = isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2473                      ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2487     auto IsSMFMAReadAsCFn = [&Reg, &MFMA, this](const MachineInstr &MI) {  in checkMAIVALUHazards()
2501       MFMA = &MI;  in checkMAIVALUHazards()
2505     MFMA = nullptr;  in checkMAIVALUHazards()
2508     if (!MFMA)  in checkMAIVALUHazards()
2511     unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA);  in checkMAIVALUHazards()