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Searched refs:MCI (Results 1 – 25 of 40) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.h89 MCInst const &MCI);
97 size_t bundleSize(MCInst const &MCI);
119 MCInst const &MCI);
186 MCInst const &MCI);
194 bool hasImmExt(MCInst const &MCI);
221 bool isBundle(MCInst const &MCI);
258 bool isImmext(MCInst const &MCI);
261 bool isInnerLoop(MCInst const &MCI);
282 bool isOuterLoop(MCInst const &MCI);
353 void setInnerLoop(MCInst &MCI);
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H A DHexagonMCInstrInfo.cpp92 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI)); in addConstExtender()
105 assert(isBundle(MCI)); in bundleInstructions()
112 assert(isBundle(MCI)); in bundleInstructions()
242 MCInst const &MCI) { in getMemAccessSize() argument
541 assert(!Result || (MCI.size() > 0 && MCI.getOperand(0).isImm())); in isBundle()
647 assert(isBundle(MCI)); in isInnerLoop()
681 assert(isBundle(MCI)); in isOuterLoop()
796 assert(isBundle(MCI)); in isMemReorderDisabled()
936 return {MCI.getOperand(I).getReg(), I, isPredicatedTrue(MCII, MCI)}; in predicateInfo()
1008 assert(isBundle(MCI)); in setInnerLoop()
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H A DHexagonMCDuplexInfo.cpp192 switch (MCI.getOpcode()) { in getDuplexCandidateGroup()
223 inRange<4>(MCI, 2)) { in getDuplexCandidateGroup()
254 inRange<3>(MCI, 2)) { in getDuplexCandidateGroup()
338 inRange<4>(MCI, 1)) { in getDuplexCandidateGroup()
375 inRange<4, 2>(MCI, 1) && inRange<1>(MCI, 2)) { in getDuplexCandidateGroup()
383 inRange<4>(MCI, 1) && inRange<1>(MCI, 2)) { in getDuplexCandidateGroup()
388 if (inRange<5, 3>(MCI, 2)) in getDuplexCandidateGroup()
425 (minConstant(MCI, 2) == 1 || minConstant(MCI, 2) == -1)) { in getDuplexCandidateGroup()
445 (minConstant(MCI, 2) == 1 || minConstant(MCI, 2) == 255)) { in getDuplexCandidateGroup()
485 inRange<2>(MCI, 2)) { in getDuplexCandidateGroup()
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H A DHexagonMCCompound.cpp350 MCInst &MCI) { in lookForCompound() argument
351 assert(HexagonMCInstrInfo::isBundle(MCI)); in lookForCompound()
355 J != MCI.end(); ++J) { in lookForCompound()
366 B != MCI.end(); ++B) { in lookForCompound()
385 MCI.erase(B); in lookForCompound()
407 if (MCI.size() < 2) in tryCompound()
411 MCInst CheckList(MCI); in tryCompound()
414 MCInst LastValidBundle(MCI); in tryCompound()
422 MCI = CheckList; in tryCompound()
427 MCI = LastValidBundle; in tryCompound()
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H A DHexagonInstPrinter.cpp41 MCInst const &MCI = *I.getInst(); in printInst() local
42 if (HexagonMCInstrInfo::isDuplex(MII, MCI)) { in printInst()
43 printInstruction(MCI.getOperand(1).getInst(), Address, OS); in printInst()
46 printInstruction(MCI.getOperand(0).getInst(), Address, OS); in printInst()
48 printInstruction(&MCI, Address, OS); in printInst()
49 HasExtender = HexagonMCInstrInfo::isImmext(MCI); in printInst()
H A DHexagonMCChecker.cpp70 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && in initReg()
74 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI); in initReg()
77 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI)) in initReg()
92 void HexagonMCChecker::init(MCInst const &MCI) { in init() argument
99 if (MCI.getOperand(i).isReg()) in init()
100 initReg(MCI, MCI.getOperand(i).getReg(), PredReg, isTrue); in init()
102 initReg(MCI, MCID.getImplicitUses()[i], PredReg, isTrue); in init()
130 HexagonMCInstrInfo::isPredicateLate(MCII, MCI)) in init()
194 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI)) in init()
196 if (MCI.getOperand(i).isReg()) { in init()
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H A DHexagonMCELFStreamer.cpp71 MCInst *MCI = const_cast<MCInst *>(I.getInst()); in emitInstruction() local
72 EmitSymbol(*MCI); in emitInstruction()
H A DHexagonAsmBackend.cpp581 MCInst &MCI = const_cast<MCInst &>(HexagonMCInstrInfo::instruction( in fixupNeedsRelaxationAdvanced() local
583 bool Relaxable = isInstRelaxable(MCI); in fixupNeedsRelaxationAdvanced()
601 *RelaxTarget = &MCI; in fixupNeedsRelaxationAdvanced()
639 *RelaxTarget = &MCI; in fixupNeedsRelaxationAdvanced()
/llvm-project-15.0.7/llvm/lib/MCA/
H A DInstrBuilder.cpp270 const MCOperand &Op = MCI.getOperand(I); in verifyOperands()
547 unsigned short Opcode = MCI.getOpcode(); in createInstrDescImpl()
573 MCI); in createInstrDescImpl()
606 populateWrites(*ID, MCI, SchedClassID); in createInstrDescImpl()
607 populateReads(*ID, MCI, SchedClassID); in createInstrDescImpl()
620 return *Descriptors[MCI.getOpcode()]; in createInstrDescImpl()
623 VariantDescriptors[&MCI] = std::move(ID); in createInstrDescImpl()
624 return *VariantDescriptors[&MCI]; in createInstrDescImpl()
630 return *Descriptors[MCI.getOpcode()]; in getOrCreateInstrDesc()
633 return *VariantDescriptors[&MCI]; in getOrCreateInstrDesc()
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/llvm-project-15.0.7/llvm/include/llvm/MCA/
H A DInstrBuilder.h77 Expected<const InstrDesc &> createInstrDescImpl(const MCInst &MCI);
78 Expected<const InstrDesc &> getOrCreateInstrDesc(const MCInst &MCI);
83 void populateWrites(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
84 void populateReads(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
85 Error verifyInstrDesc(const InstrDesc &ID, const MCInst &MCI) const;
102 Expected<std::unique_ptr<Instruction>> createInstruction(const MCInst &MCI);
H A DSupport.h33 InstructionError(std::string M, const T &MCI) in InstructionError() argument
34 : Message(std::move(M)), Inst(MCI) {} in InstructionError()
/llvm-project-15.0.7/llvm/tools/llvm-mca/Views/
H A DInstructionView.cpp25 InstructionView::printInstructionString(const llvm::MCInst &MCI) const { in printInstructionString()
27 MCIP.printInst(&MCI, 0, "", STI, InstrStream); in printInstructionString()
35 for (const auto &MCI : getSource()) { in toJSON() local
36 StringRef Instruction = printInstructionString(MCI); in toJSON()
H A DResourcePressureView.cpp159 for (const MCInst &MCI : Source) { in printResourcePressurePerInst() local
166 FOS << printInstructionString(MCI) << '\n'; in printResourcePressurePerInst()
H A DInstructionView.h48 StringRef printInstructionString(const llvm::MCInst &MCI) const;
/llvm-project-15.0.7/llvm/lib/Target/X86/MCA/
H A DX86CustomBehaviour.cpp24 const MCInst &MCI) { in setMemBarriers() argument
25 switch (MCI.getOpcode()) { in setMemBarriers()
40 std::unique_ptr<Instruction> &Inst, const MCInst &MCI) { in postProcessInstruction() argument
43 setMemBarriers(Inst, MCI); in postProcessInstruction()
H A DX86CustomBehaviour.h28 void processWaitCnt(std::unique_ptr<Instruction> &Inst, const MCInst &MCI);
32 void setMemBarriers(std::unique_ptr<Instruction> &Inst, const MCInst &MCI);
41 const MCInst &MCI) override;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonMCInstLower.cpp120 MCInst *MCI = AP.OutContext.createMCInst(); in HexagonLowerToMC() local
121 MCI->setOpcode(MI->getOpcode()); in HexagonLowerToMC()
122 assert(MCI->getOpcode() == static_cast<unsigned>(MI->getOpcode()) && in HexagonLowerToMC()
187 MCI->addOperand(MCO); in HexagonLowerToMC()
189 AP.HexagonProcessInstruction(*MCI, *MI); in HexagonLowerToMC()
190 HexagonMCInstrInfo::extendIfNeeded(AP.OutContext, MCII, MCB, *MCI); in HexagonLowerToMC()
191 MCB.addOperand(MCOperand::createInst(MCI)); in HexagonLowerToMC()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCA/
H A DAMDGPUCustomBehaviour.cpp25 std::unique_ptr<Instruction> &Inst, const MCInst &MCI) { in postProcessInstruction() argument
26 switch (MCI.getOpcode()) { in postProcessInstruction()
39 return processWaitCnt(Inst, MCI); in postProcessInstruction()
46 const MCInst &MCI) { in processWaitCnt() argument
47 for (int Idx = 0, N = MCI.size(); Idx < N; Idx++) { in processWaitCnt()
49 const MCOperand &MCOp = MCI.getOperand(Idx); in processWaitCnt()
H A DAMDGPUCustomBehaviour.h28 void processWaitCnt(std::unique_ptr<Instruction> &Inst, const MCInst &MCI);
37 const MCInst &MCI) override;
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DSchedClassResolution.cpp222 const MCInst &MCI) { in ResolveVariantSchedClassId() argument
225 SchedClassId = STI.resolveVariantSchedClass(SchedClassId, &MCI, &InstrInfo, in ResolveVariantSchedClassId()
234 const MCInst &MCI) { in resolveSchedClassId() argument
235 unsigned SchedClassId = InstrInfo.get(MCI.getOpcode()).getSchedClass(); in resolveSchedClassId()
240 ResolveVariantSchedClassId(SubtargetInfo, InstrInfo, SchedClassId, MCI); in resolveSchedClassId()
H A DSchedClassResolution.h45 const MCInstrInfo &InstrInfo, const MCInst &MCI);
H A DAnalysis.cpp136 const MCInst &MCI = Point.keyInstruction(); in printInstructionRowCsv() local
139 *SubtargetInfo_, *InstrInfo_, MCI); in printInstructionRowCsv()
231 const MCInst &MCI = Point.keyInstruction(); in makePointsPerSchedClass() local
236 MCI); in makePointsPerSchedClass()
H A DClustering.cpp199 const MCInst &MCI = Point.keyInstruction(); in clusterizeNaive() local
202 ResolvedSchedClass::resolveSchedClassId(SubtargetInfo, InstrInfo, MCI); in clusterizeNaive()
203 const unsigned Opcode = MCI.getOpcode(); in clusterizeNaive()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DLint.cpp287 MemCpyInst *MCI = cast<MemCpyInst>(&I); in visitCallBase() local
288 visitMemoryReference(I, MemoryLocation::getForDest(MCI), in visitCallBase()
289 MCI->getDestAlign(), nullptr, MemRef::Write); in visitCallBase()
290 visitMemoryReference(I, MemoryLocation::getForSource(MCI), in visitCallBase()
291 MCI->getSourceAlign(), nullptr, MemRef::Read); in visitCallBase()
298 dyn_cast<ConstantInt>(findValue(MCI->getLength(), in visitCallBase()
302 Check(AA->alias(MCI->getSource(), Size, MCI->getDest(), Size) != in visitCallBase()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-mca/
H A DMCATestBase.cpp70 for (const auto &MCI : Insts) { in runBaselineMCA() local
72 IB.createInstruction(MCI); in runBaselineMCA()

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