Lines Matching refs:MCI

265 static Error verifyOperands(const MCInstrDesc &MCDesc, const MCInst &MCI) {  in verifyOperands()  argument
269 for (I = 0, E = MCI.getNumOperands(); NumExplicitDefs && I < E; ++I) { in verifyOperands()
270 const MCOperand &Op = MCI.getOperand(I); in verifyOperands()
277 "Expected more register operand definitions.", MCI); in verifyOperands()
282 const MCOperand &Op = MCI.getOperand(MCDesc.getNumOperands() - 1); in verifyOperands()
283 if (I == MCI.getNumOperands() || !Op.isReg()) { in verifyOperands()
287 return make_error<InstructionError<MCInst>>(Message, MCI); in verifyOperands()
294 void InstrBuilder::populateWrites(InstrDesc &ID, const MCInst &MCI, in populateWrites() argument
296 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateWrites()
350 unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands(); in populateWrites()
358 for (; i < MCI.getNumOperands() && CurrentDef < NumExplicitDefs; ++i) { in populateWrites()
359 const MCOperand &Op = MCI.getOperand(i); in populateWrites()
442 const MCOperand &Op = MCI.getOperand(OpIndex); in populateWrites()
463 void InstrBuilder::populateReads(InstrDesc &ID, const MCInst &MCI, in populateReads() argument
465 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateReads()
471 unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands(); in populateReads()
477 const MCOperand &Op = MCI.getOperand(OpIndex); in populateReads()
508 const MCOperand &Op = MCI.getOperand(OpIndex); in populateReads()
525 const MCInst &MCI) const { in verifyInstrDesc()
538 return make_error<InstructionError<MCInst>>(std::string(Message), MCI); in verifyInstrDesc()
542 InstrBuilder::createInstrDescImpl(const MCInst &MCI) { in createInstrDescImpl() argument
547 unsigned short Opcode = MCI.getOpcode(); in createInstrDescImpl()
560 STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in createInstrDescImpl()
564 "unable to resolve scheduling class for write variant.", MCI); in createInstrDescImpl()
573 MCI); in createInstrDescImpl()
603 if (Error Err = verifyOperands(MCDesc, MCI)) in createInstrDescImpl()
606 populateWrites(*ID, MCI, SchedClassID); in createInstrDescImpl()
607 populateReads(*ID, MCI, SchedClassID); in createInstrDescImpl()
613 if (Error Err = verifyInstrDesc(*ID, MCI)) in createInstrDescImpl()
619 Descriptors[MCI.getOpcode()] = std::move(ID); in createInstrDescImpl()
620 return *Descriptors[MCI.getOpcode()]; in createInstrDescImpl()
623 VariantDescriptors[&MCI] = std::move(ID); in createInstrDescImpl()
624 return *VariantDescriptors[&MCI]; in createInstrDescImpl()
628 InstrBuilder::getOrCreateInstrDesc(const MCInst &MCI) { in getOrCreateInstrDesc() argument
629 if (Descriptors.find_as(MCI.getOpcode()) != Descriptors.end()) in getOrCreateInstrDesc()
630 return *Descriptors[MCI.getOpcode()]; in getOrCreateInstrDesc()
632 if (VariantDescriptors.find(&MCI) != VariantDescriptors.end()) in getOrCreateInstrDesc()
633 return *VariantDescriptors[&MCI]; in getOrCreateInstrDesc()
635 return createInstrDescImpl(MCI); in getOrCreateInstrDesc()
641 InstrBuilder::createInstruction(const MCInst &MCI) { in createInstruction() argument
642 Expected<const InstrDesc &> DescOrErr = getOrCreateInstrDesc(MCI); in createInstruction()
661 CreatedIS = std::make_unique<Instruction>(D, MCI.getOpcode()); in createInstruction()
665 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in createInstruction()
683 IsZeroIdiom = MCIA->isZeroIdiom(MCI, Mask, ProcID); in createInstruction()
685 IsZeroIdiom || MCIA->isDependencyBreaking(MCI, Mask, ProcID); in createInstruction()
686 if (MCIA->isOptimizableRegisterMove(MCI, ProcID)) in createInstruction()
696 const MCOperand &Op = MCI.getOperand(RD.OpIndex); in createInstruction()
759 MCIA->clearsSuperRegisters(MRI, MCI, WriteMask); in createInstruction()
766 : MCI.getOperand(WD.OpIndex).getReg(); in createInstruction()