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Searched refs:LogicOp0 (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp13596 SDValue LogicOp0 = N0.getOperand(0); in foldBitcastedFPLogic() local
13599 LogicOp0.getOpcode() == ISD::BITCAST && in foldBitcastedFPLogic()
13600 LogicOp0.getOperand(0).getValueType() == VT) { in foldBitcastedFPLogic()
13601 SDValue FPOp = DAG.getNode(FPOpcode, SDLoc(N), VT, LogicOp0.getOperand(0)); in foldBitcastedFPLogic()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp42881 SDValue LogicOp0 = N0.getOperand(0); in combineBitcast() local
42886 if (N0.hasOneUse() && LogicOp0.getOpcode() == ISD::BITCAST && in combineBitcast()
42887 LogicOp0.hasOneUse() && LogicOp0.getOperand(0).hasOneUse() && in combineBitcast()
42888 LogicOp0.getOperand(0).getValueType() == VT && in combineBitcast()
42889 !isa<ConstantSDNode>(LogicOp0.getOperand(0))) { in combineBitcast()
42892 return DAG.getNode(Opcode, DL0, VT, LogicOp0.getOperand(0), CastedOp1); in combineBitcast()
42899 SDValue CastedOp0 = DAG.getBitcast(VT, LogicOp0); in combineBitcast()