| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1301 EVT MemVT = LoadNode->getMemoryVT(); in LowerLOAD()
1311 SDValue Chain = LoadNode->getChain(); in LowerLOAD()
1312 SDValue Ptr = LoadNode->getBasePtr(); in LowerLOAD()
1330 return constBufferLoad(LoadNode, LoadNode->getAddressSpace(), DAG); in LowerLOAD()
1365 LoadNode->getAlign(), LoadNode->getMemOperand()->getFlags()); in LowerLOAD()
1652 SDLoc DL(LoadNode); in constBufferLoad()
1653 EVT VT = LoadNode->getValueType(0); in constBufferLoad()
1654 SDValue Chain = LoadNode->getChain(); in constBufferLoad()
1655 SDValue Ptr = LoadNode->getBasePtr(); in constBufferLoad()
1659 if (LoadNode->getMemoryVT().getScalarType() != MVT::i32 || !ISD::isNON_EXTLoad(LoadNode)) in constBufferLoad()
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| H A D | R600ISelLowering.h | 112 SDValue constBufferLoad(LoadSDNode *LoadNode, int Block,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 238 SDNode *LoadNode = NewNodes[0]; in CopyAndMoveSuccessors() local
244 SDValue(LoadNode, 1)); in CopyAndMoveSuccessors()
265 if (LoadNode->getNodeId() != -1) { in CopyAndMoveSuccessors()
266 LoadSU = &SUnits[LoadNode->getNodeId()]; in CopyAndMoveSuccessors()
269 LoadSU = newSUnit(LoadNode); in CopyAndMoveSuccessors()
270 LoadNode->setNodeId(LoadSU->NodeNum); in CopyAndMoveSuccessors()
282 Pred.getSUnit()->getNode()->isOperandOf(LoadNode)) in CopyAndMoveSuccessors()
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| H A D | ScheduleDAGRRList.cpp | 995 SDNode *LoadNode = NewNodes[0]; in TryUnfoldSU() local
1004 if (LoadNode->getNodeId() != -1) { in TryUnfoldSU()
1005 LoadSU = &SUnits[LoadNode->getNodeId()]; in TryUnfoldSU()
1012 LoadSU = CreateNewSUnit(LoadNode); in TryUnfoldSU()
1013 LoadNode->setNodeId(LoadSU->NodeNum); in TryUnfoldSU()
1054 SDValue(LoadNode, 1)); in TryUnfoldSU()
1065 else if (isOperandOf(Pred.getSUnit(), LoadNode)) in TryUnfoldSU()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1248 LoadSDNode *&LoadNode, in isFusableLoadOpStorePattern() argument
1268 LoadNode = cast<LoadSDNode>(Load); in isFusableLoadOpStorePattern()
1275 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern()
1276 LoadNode->getOffset() != StoreNode->getOffset()) in isFusableLoadOpStorePattern()
1286 InputChain = LoadNode->getChain(); in isFusableLoadOpStorePattern()
1307 if (Op.getNode() != LoadNode) in isFusableLoadOpStorePattern()
1374 LoadSDNode *LoadNode = nullptr; in tryFoldLoadStoreIntoMemOperand() local
1376 if (!isFusableLoadOpStorePattern(StoreNode, StoredVal, CurDAG, LoadNode, in tryFoldLoadStoreIntoMemOperand()
1399 Result, {StoreNode->getMemOperand(), LoadNode->getMemOperand()}); in tryFoldLoadStoreIntoMemOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrArithmetic.td | 556 /// LoadNode - This is the load node associated with this type. For
558 PatFrag LoadNode = loadnode;
729 (opnode typeinfo.RegClass:$src1, (typeinfo.LoadNode addr:$src2)))]>;
736 (opnode typeinfo.RegClass:$src1, (typeinfo.LoadNode addr:$src2)))]>;
743 (opnode typeinfo.RegClass:$src1, (typeinfo.LoadNode addr:$src2),
844 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
877 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
910 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
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| H A D | X86ISelDAGToDAG.cpp | 3102 LoadSDNode *&LoadNode, in isFusableLoadOpStorePattern() argument
3119 LoadNode = cast<LoadSDNode>(Load); in isFusableLoadOpStorePattern()
3126 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern()
3127 LoadNode->getOffset() != StoreNode->getOffset()) in isFusableLoadOpStorePattern()
3198 if (Op.getNode() != LoadNode) in isFusableLoadOpStorePattern()
3264 LoadSDNode *LoadNode = nullptr; in foldLoadStoreIntoMemOperand() local
3267 LoadNode, InputChain)) { in foldLoadStoreIntoMemOperand()
3274 LoadNode, InputChain)) in foldLoadStoreIntoMemOperand()
3279 if (!selectAddr(LoadNode, LoadNode->getBasePtr(), Base, Scale, Index, Disp, in foldLoadStoreIntoMemOperand()
3462 LoadNode->getMemOperand()}; in foldLoadStoreIntoMemOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5112 SDValue Mask = LoadNode->getMask(); in LowerMLOAD()
5118 VT, DL, LoadNode->getChain(), LoadNode->getBasePtr(), in LowerMLOAD()
5119 LoadNode->getOffset(), Mask, DAG.getUNDEF(VT), LoadNode->getMemoryVT(), in LowerMLOAD()
5120 LoadNode->getMemOperand(), LoadNode->getAddressingMode(), in LowerMLOAD()
5121 LoadNode->getExtensionType()); in LowerMLOAD()
5273 SDValue Base = LoadNode->getBasePtr(); in LowerLOAD()
5274 SDValue Chain = LoadNode->getChain(); in LowerLOAD()
5293 if (LoadNode->getMemoryVT() != MVT::v4i8) in LowerLOAD()
20295 if ((!LoadNode->isVolatile() && !LoadNode->isAtomic()) || in ReplaceNodeResults()
20305 {LoadNode->getChain(), LoadNode->getBasePtr()}, LoadNode->getMemoryVT(), in ReplaceNodeResults()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsDSPInstrInfo.td | 1461 class IndexedLoadPat<SDPatternOperator LoadNode, Instruction Instr> :
1462 DSPPat<(i32 (LoadNode (add i32:$base, i32:$index))),
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