| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | LiveInterval.cpp | 67 LiveRange *LR; 350 LiveRange::iterator LiveRange::find(SlotIndex Pos) { in find() 389 bool LiveRange::overlapsFrom(const LiveRange& other, in overlapsFrom() 430 bool LiveRange::overlaps(const LiveRange &Other, const CoalescerPair &CP, in overlaps() 479 bool LiveRange::covers(const LiveRange &Other) const { in covers() 533 LiveRange::iterator LiveRange::addSegment(Segment S) { in addSegment() 604 LiveRange::iterator LiveRange::removeSegment(iterator I, bool RemoveDeadValNo) { in removeSegment() 627 void LiveRange::join(LiveRange &Other, in join() 710 void LiveRange::MergeSegmentsInAsValue(const LiveRange &RHS, in MergeSegmentsInAsValue() 722 void LiveRange::MergeValueInAsValue(const LiveRange &RHS, in MergeValueInAsValue() [all …]
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| H A D | LiveIntervals.cpp | 112 for (LiveRange *LR : RegUnitRanges) in releaseMemory() 377 -> const LiveRange& { in extendSegmentsToUses() 495 LiveRange NewLR; in shrinkToUses() 599 LiveRange NewLR; in shrinkToUses() 699 SmallVector<std::pair<const LiveRange*, LiveRange::const_iterator>, 8> RU; in addKillFlags() 875 LiveRange::Segment 986 SmallPtrSet<LiveRange*, 8> Updated; 1102 LiveRange::iterator E = LR.end(); in handleMoveDown() 1110 LiveRange::iterator OldIdxOut; in handleMoveDown() 1179 LiveRange::iterator AfterNewIdx in handleMoveDown() [all …]
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| H A D | LiveIntervalUnion.cpp | 30 const LiveRange &Range) { in unify() 36 LiveRange::const_iterator RegPos = Range.begin(); in unify() 37 LiveRange::const_iterator RegEnd = Range.end(); in unify() 58 const LiveRange &Range) { in extract() 64 LiveRange::const_iterator RegPos = Range.begin(); in extract() 65 LiveRange::const_iterator RegEnd = Range.end(); in extract() 152 LiveRange::const_iterator LREnd = LR->end(); in collectInterferingVRegs()
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| H A D | LiveRegMatrix.cpp | 111 TRI, VirtReg, PhysReg, [&](unsigned Unit, const LiveRange &Range) { in assign() 128 [&](unsigned Unit, const LiveRange &Range) { in unassign() 171 const LiveRange &Range) { in checkRegUnitInterference() 172 const LiveRange &UnitRange = LIS->getRegUnit(Unit); in checkRegUnitInterference() 178 LiveIntervalUnion::Query &LiveRegMatrix::query(const LiveRange &LR, in query() 201 [&](MCRegister Unit, const LiveRange &LR) { in checkInterference() 214 LiveRange::Segment Seg(Start, End, &valno); in checkInterference() 215 LiveRange LR; in checkInterference()
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| H A D | SafeStackLayout.h | 30 StackLifetime::LiveRange Range; 33 const StackLifetime::LiveRange &Range) in StackRegion() 44 StackLifetime::LiveRange Range; 60 const StackLifetime::LiveRange &Range);
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| H A D | LiveIntervalCalc.cpp | 34 LiveRange &LR, const MachineOperand &MO) { in createDeadDef() 109 LiveRange &MainRange = LI; in constructMainRangeFromSubranges() 124 void LiveIntervalCalc::createDeadDefs(LiveRange &LR, Register Reg) { in createDeadDefs() 136 void LiveIntervalCalc::extendToUses(LiveRange &LR, Register Reg, in extendToUses()
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| H A D | LiveRangeCalc.cpp | 87 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, in extend() 122 bool LiveRangeCalc::isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs, in isDefOnEntry() 159 LiveRange::iterator UB = upper_bound(LR, End.getPrevSlot()); in isDefOnEntry() 161 LiveRange::Segment &Seg = *std::prev(UB); in isDefOnEntry() 191 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, in findReachingDefs() 398 LiveRange &LR = I.LR; in updateSSA()
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| H A D | RegisterCoalescer.cpp | 236 bool copyValueUndefInPredecessors(LiveRange &S, 279 void joinSubRegRanges(LiveRange &LRange, LiveRange &RRange, 771 for (LiveRange::Segment &ASeg : IntA.segments) { in hasOtherReachingDefs() 791 addSegmentsWithValNo(LiveRange &Dst, VNInfo *DstValNo, const LiveRange &Src, in addSegmentsWithValNo() 804 LiveRange::Segment Added = LiveRange::Segment(S.start, S.end, DstValNo); in addSegmentsWithValNo() 2245 LiveRange &LR = LIS->getRegUnit(*UI); in joinReservedPhysReg() 2330 LiveRange &LR; 3305 assert(&static_cast<LiveRange&>(LI) == &LR); in pruneMainSegments() 3375 LiveRange::iterator I = SR.find(Def); in eraseInstrs() 3391 LiveRange::iterator S = LR.find(Def); in eraseInstrs() [all …]
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| H A D | SafeStackLayout.cpp | 40 const StackLifetime::LiveRange &Range) { in addObject() 98 Regions.emplace_back(LastRegionEnd, Start, StackLifetime::LiveRange(0)); in layoutObject()
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| H A D | MachineVerifier.cpp | 240 void report_context(const LiveRange &LR, Register VRegUnit, 242 void report_context(const LiveRange::Segment &S) const; 246 void report_context_liverange(const LiveRange &LR) const; 255 SlotIndex UseIdx, const LiveRange &LR, 259 SlotIndex DefIdx, const LiveRange &LR, 273 void verifyLiveRangeSegment(const LiveRange &, 276 void verifyLiveRange(const LiveRange &, Register, 2229 const LiveRange &LR, in checkLivenessAtUse() 2253 const LiveRange &LR, in checkLivenessAtDef() 2865 if (const LiveRange *LR = LiveInts->getCachedRegUnit(i)) in verifyLiveIntervals() [all …]
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| H A D | RegisterPressure.cpp | 237 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { in getLiveRange() 425 bool (*Property)(const LiveRange &LR, SlotIndex Pos)) { in getLanesWithProperty() 441 const LiveRange *LR = LIS.getCachedRegUnit(RegUnit); in getLanesWithProperty() 456 [](const LiveRange &LR, SlotIndex Pos) { in getLiveLanesAt() 586 const LiveRange *LR = getLiveRange(LIS, Reg); in detectDeadDefs() 1250 [](const LiveRange &LR, SlotIndex Pos) { in getLiveLanesAt() 1260 [](const LiveRange &LR, SlotIndex Pos) { in getLastUsedLanes() 1261 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); in getLastUsedLanes() 1271 [](const LiveRange &LR, SlotIndex Pos) { in getLiveThroughAt() 1272 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); in getLiveThroughAt()
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| H A D | SplitKit.h | 37 class LiveRange; variable 411 LiveRange &LR, LaneBitmask LM,
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| H A D | TwoAddressInstructionPass.cpp | 1530 LI.addSegment(LiveRange::Segment(LastCopyIdx, endIdx, VNI)); in processTiedPairs() 1533 S.addSegment(LiveRange::Segment(LastCopyIdx, endIdx, VNI)); in processTiedPairs() 1537 if (LiveRange *LR = LIS->getCachedRegUnit(*Unit)) { in processTiedPairs() 1540 LR->addSegment(LiveRange::Segment(LastCopyIdx, endIdx, VNI)); in processTiedPairs() 1598 auto Shrink = [=](LiveRange &LR, LaneBitmask LaneMask) { in processTiedPairs() 1599 LiveRange::Segment *S = LR.getSegmentContaining(LastCopyIdx); in processTiedPairs() 1667 LiveRange::Segment NewSeg(S.start, S.end, VNI); in processStatepoint() 1818 LiveRange::iterator UseSeg = S.FindSegmentContaining(Idx); in runOnMachineFunction() 1819 LiveRange::iterator DefSeg = std::next(UseSeg); in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | LiveInterval.h | 157 class LiveRange { 239 LiveRange(bool UseSegmentSet = false) 245 LiveRange(const LiveRange &Other, BumpPtrAllocator &Allocator) { in LiveRange() function 509 void join(LiveRange &Other, 688 using super = LiveRange; 693 class SubRange : public LiveRange { 935 LiveRange *LR; 937 LiveRange::iterator WriteI; 938 LiveRange::iterator ReadI; 952 void add(LiveRange::Segment); [all …]
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| H A D | LiveIntervals.h | 94 SmallVector<LiveRange*, 0> RegUnitRanges; 182 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices, 196 void pruneValue(LiveRange &LR, SlotIndex Kill, 239 bool isLiveInToMBB(const LiveRange &LR, in isLiveInToMBB() 244 bool isLiveOutOfMBB(const LiveRange &LR, in isLiveOutOfMBB() 387 LiveRange &getRegUnit(unsigned Unit) { in getRegUnit() 388 LiveRange *LR = RegUnitRanges[Unit]; in getRegUnit() 400 LiveRange *getCachedRegUnit(unsigned Unit) { in getCachedRegUnit() 404 const LiveRange *getCachedRegUnit(unsigned Unit) const { in getCachedRegUnit() 465 void computeRegUnitRange(LiveRange&, unsigned Unit); [all …]
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| H A D | LiveRangeCalc.h | 76 using EntryInfoMap = DenseMap<LiveRange *, std::pair<BitVector, BitVector>>; 103 LiveRange &LR; 117 LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill) in LiveInBlock() 129 bool isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs, 149 bool findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use, 207 void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, 243 void addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode,
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| H A D | LiveIntervalUnion.h | 91 void unify(const LiveInterval &VirtReg, const LiveRange &Range); 94 void extract(const LiveInterval &VirtReg, const LiveRange &Range); 114 const LiveRange *LR = nullptr; 115 LiveRange::const_iterator LRI; ///< current position in LR 132 Query(const LiveRange &LR, const LiveIntervalUnion &LIU) in Query() 137 void reset(unsigned NewUserTag, const LiveRange &NewLR, in reset() 148 void init(unsigned NewUserTag, const LiveRange &NewLR, in init()
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| H A D | LiveIntervalCalc.h | 39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask, 48 void createDeadDefs(LiveRange &LR, Register Reg); 54 void extendToUses(LiveRange &LR, MCRegister PhysReg) { in extendToUses()
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| H A D | LiveRegMatrix.h | 153 LiveIntervalUnion::Query &query(const LiveRange &LR, MCRegister RegUnit);
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | StackLifetime.h | 63 class LiveRange { 66 const StackLifetime::LiveRange &R); 69 LiveRange(unsigned Size, bool Set = false) : Bits(Size, Set) {} in Bits() 72 bool overlaps(const LiveRange &Other) const { in overlaps() 76 void join(const LiveRange &Other) { Bits |= Other.Bits; } in join() 109 SmallVector<LiveRange, 8> LiveRanges; 152 const LiveRange &getLiveRange(const AllocaInst *AI) const; 162 LiveRange getFullLiveRange() const { in getFullLiveRange() 163 return LiveRange(Instructions.size(), true); in getFullLiveRange() 179 const StackLifetime::LiveRange &R) {
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 83 static bool isDefBetween(const LiveRange &LR, SlotIndex AndIdx, in isDefBetween() 224 auto applyLiveRanges = [&](LiveRange &Dst, VNInfo *VNI) { in optimizeVcndVcmpPair() 234 Dst.addSegment(LiveRange::Segment(Start, End, VNI)); in optimizeVcndVcmpPair() 238 Dst.addSegment(LiveRange::Segment(CmpIdx.getRegSlot(), AndIdx.getRegSlot(), VNI)); in optimizeVcndVcmpPair() 353 LiveRange &RegUnit = LIS->getRegUnit(*UI); in optimizeElseBranch()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | StackLifetime.cpp | 34 const StackLifetime::LiveRange & 323 LiveRanges.resize(NumAllocas, LiveRange(Instructions.size())); in run() 329 LiveRanges.resize(NumAllocas, LiveRange(Instructions.size())); in run()
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| /llvm-project-15.0.7/llvm/test/CodeGen/Generic/ |
| H A D | badCallArgLRLLVM.ll | 6 ; so no LiveRange has been created for its return value.
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | at-least-one-def-value-assert.mir | 16 # LiveRange should be produced and the verifier will catch it.
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 206 void updateDeadsInRange(Register Reg, LaneBitmask LM, LiveRange &Range); 350 LiveRange::iterator F = S.find(I->end); in updateKillFlags() 368 LiveRange &Range) { in updateDeadsInRange() 1109 for (LiveRange::Segment &LR : LI) { in isIntraBlocks() 1162 for (LiveRange::Segment &I : L2) { in coalesceRegisters() 1171 L1.addSegment(LiveRange::Segment(I.start, I.end, NewVN)); in coalesceRegisters()
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