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Searched refs:LDST (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/
H A DELF_ARM64_relocations.s37 # Align next label to 16 bytes, so that LDST immediate
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-misched-basic-A53.ll178 ; Resource contention on LDST.
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsScheduleP5600.td106 // LDST Pipeline
150 // LDST is also used in moves from general purpose registers to floating point
H A DMipsScheduleGeneric.td541 // LDST Pipeline
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleR52.td16 // There are two ALUs, one LDST, one MUL and a non-pipelined integer DIV.
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5687 bool DAGCombiner::isLegalNarrowLdSt(LSBaseSDNode *LDST, in isLegalNarrowLdSt() argument
5690 if (!LDST) in isLegalNarrowLdSt()
5702 if (!LDST->isSimple()) in isLegalNarrowLdSt()
5705 EVT LdStMemVT = LDST->getMemoryVT(); in isLegalNarrowLdSt()
5720 const Align LDSTAlign = LDST->getAlign(); in isLegalNarrowLdSt()
5723 LDST->getAddressSpace(), NarrowAlign, in isLegalNarrowLdSt()
5724 LDST->getMemOperand()->getFlags())) in isLegalNarrowLdSt()
5729 EVT PtrType = LDST->getBasePtr().getValueType(); in isLegalNarrowLdSt()
5733 if (isa<LoadSDNode>(LDST)) { in isLegalNarrowLdSt()
5734 LoadSDNode *Load = cast<LoadSDNode>(LDST); in isLegalNarrowLdSt()
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