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Searched refs:IsA16 (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp4770 (I >= Intr->CoordStart && !IsA16)) { in packImage16bitOpsToDwords()
4771 if ((I < Intr->GradientStart) && IsA16 && in packImage16bitOpsToDwords()
4890 const bool IsA16 = AddrTy == S16; in legalizeImageIntrinsic() local
4955 if (IsA16 && !ST.hasA16()) { in legalizeImageIntrinsic()
4960 if (IsA16 || IsG16) { in legalizeImageIntrinsic()
5019 if (IsA16) in legalizeImageIntrinsic()
5422 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
5428 BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
5447 if (IsA16) { in legalizeBVHIntrinsic()
5484 if (IsA16) { in legalizeBVHIntrinsic()
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H A DSIISelLowering.cpp6339 bool IsA16 = false; in lowerImage() local
6429 IsA16 = VAddrScalarVT == MVT::f16 || VAddrScalarVT == MVT::i16; in lowerImage()
6448 if (BaseOpcode->Gradients && !ST->hasG16() && (IsA16 != IsG16)) { in lowerImage()
6457 if (IsA16) { in lowerImage()
6491 if (IsA16) { in lowerImage()
6601 Ops.push_back(IsA16 && // r128, a16 for gfx9 in lowerImage()
6604 Ops.push_back(IsA16 ? True : False); in lowerImage()
7708 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN()
7714 AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN()
7754 if (IsA16) { in LowerINTRINSIC_W_CHAIN()
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H A DAMDGPUInstructionSelector.cpp1582 const bool IsA16 = (Flags & 1) != 0; in selectImageIntrinsic() local
1586 if (IsA16 && !STI.hasG16() && !IsG16) in selectImageIntrinsic()
1630 if (IsG16 && !IsA16) { in selectImageIntrinsic()
1750 MIB.addImm(IsA16 && // a16 or r128 in selectImageIntrinsic()
1753 MIB.addImm(IsA16 ? -1 : 0); in selectImageIntrinsic()
H A DSIInstrInfo.cpp4505 bool IsA16 = false; in verifyInstruction() local
4508 IsA16 = R128A16->getImm() != 0; in verifyInstruction()
4511 IsA16 = A16->getImm() != 0; in verifyInstruction()
4517 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, ST.hasG16()); in verifyInstruction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp220 const MIMGDimInfo *Dim, bool IsA16, in getAddrSizeMIMGOp() argument
225 if (IsA16) in getAddrSizeMIMGOp()
236 if ((IsA16 && !IsG16Supported) || BaseOpcode->G16) in getAddrSizeMIMGOp()
H A DAMDGPUBaseInfo.h397 const MIMGDimInfo *Dim, bool IsA16,
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp876 const bool IsA16 = (A16Idx != -1 && MI.getOperand(A16Idx).getImm()); in convertMIMGInst() local
879 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, AMDGPU::hasG16(STI)); in convertMIMGInst()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3628 bool IsA16 = (A16Idx != -1 && Inst.getOperand(A16Idx).getImm()); in validateMIMGAddrSize() local
3631 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, DimInfo, IsA16, hasG16()); in validateMIMGAddrSize()