Lines Matching refs:IsA16
4756 bool IsA16, bool IsG16) { in packImage16bitOpsToDwords() argument
4770 (I >= Intr->CoordStart && !IsA16)) { in packImage16bitOpsToDwords()
4771 if ((I < Intr->GradientStart) && IsA16 && in packImage16bitOpsToDwords()
4780 assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) && in packImage16bitOpsToDwords()
4890 const bool IsA16 = AddrTy == S16; in legalizeImageIntrinsic() local
4949 if (BaseOpcode->Gradients && !ST.hasG16() && (IsA16 != IsG16)) { in legalizeImageIntrinsic()
4955 if (IsA16 && !ST.hasA16()) { in legalizeImageIntrinsic()
4960 if (IsA16 || IsG16) { in legalizeImageIntrinsic()
4964 packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, in legalizeImageIntrinsic()
5019 if (IsA16) in legalizeImageIntrinsic()
5410 const bool IsA16 = MRI.getType(RayDir).getElementType().getSizeInBits() == 16; in legalizeBVHIntrinsic() local
5413 const unsigned NumVAddrDwords = IsA16 ? (Is64 ? 9 : 8) : (Is64 ? 12 : 11); in legalizeBVHIntrinsic()
5414 const unsigned NumVAddrs = IsGFX11Plus ? (IsA16 ? 4 : 5) : NumVAddrDwords; in legalizeBVHIntrinsic()
5422 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
5428 BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
5447 if (IsA16) { in legalizeBVHIntrinsic()
5484 if (IsA16) { in legalizeBVHIntrinsic()
5520 .addImm(IsA16 ? 1 : 0) in legalizeBVHIntrinsic()