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/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/include/llvm/IR/
H A DBUILD.gn11 td_file = "Intrinsics.td"
17 td_file = "Intrinsics.td"
27 td_file = "Intrinsics.td"
37 td_file = "Intrinsics.td"
47 td_file = "Intrinsics.td"
57 td_file = "Intrinsics.td"
67 td_file = "Intrinsics.td"
77 td_file = "Intrinsics.td"
87 td_file = "Intrinsics.td"
97 td_file = "Intrinsics.td"
[all …]
/llvm-project-15.0.7/mlir/test/mlir-tblgen/
H A Dllvm-intrinsics.td2 // files and produce ODS. Unlike MLIR, LLVM's main Intrinsics.td file that
11 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
12 // RUN: | grep -v "llvm/IR/Intrinsics" \
37 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
38 // RUN: | grep -v "llvm/IR/Intrinsics" \
59 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
60 // RUN: | grep -v "llvm/IR/Intrinsics" \
84 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
85 // RUN: | grep -v "llvm/IR/Intrinsics" \
92 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
[all …]
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenIntrinsics.h205 std::vector<CodeGenIntrinsic> Intrinsics; variable
218 bool empty() const { return Intrinsics.empty(); } in empty()
219 size_t size() const { return Intrinsics.size(); } in size()
220 CodeGenIntrinsic &operator[](size_t Pos) { return Intrinsics[Pos]; }
222 return Intrinsics[Pos];
H A DCodeGenDAGPatterns.h1104 CodeGenIntrinsicTable Intrinsics; variable
1162 for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i) in getIntrinsic()
1163 if (Intrinsics[i].TheDef == R) return Intrinsics[i]; in getIntrinsic()
1168 if (IID-1 < Intrinsics.size()) in getIntrinsicInfo()
1169 return Intrinsics[IID-1]; in getIntrinsicInfo()
1174 for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i) in getIntrinsicID()
1175 if (Intrinsics[i].TheDef == R) return i; in getIntrinsicID()
H A DCodeGenTarget.cpp644 Intrinsics.reserve(Defs.size()); in CodeGenIntrinsicTable()
647 Intrinsics.push_back(CodeGenIntrinsic(Defs[I], DefaultProperties)); in CodeGenIntrinsicTable()
649 llvm::sort(Intrinsics, in CodeGenIntrinsicTable()
655 for (size_t I = 0, E = Intrinsics.size(); I < E; ++I) in CodeGenIntrinsicTable()
656 if (Intrinsics[I].TargetPrefix != Targets.back().Name) { in CodeGenIntrinsicTable()
658 Targets.push_back({Intrinsics[I].TargetPrefix, I, 0}); in CodeGenIntrinsicTable()
660 Targets.back().Count = Intrinsics.size() - Targets.back().Offset; in CodeGenIntrinsicTable()
/llvm-project-15.0.7/llvm/include/llvm/
H A Dmodule.install.modulemap16 textual header "IR/Intrinsics.gen"
17 textual header "IR/Intrinsics.inc"
H A Dmodule.modulemap237 // Intrinsics.h because they need to be generated by tablegen first.
262 // Intrinsics.h
279 header "IR/Intrinsics.h"
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DIntrinsics.td1 //===- Intrinsics.td - Defines all LLVM intrinsics ---------*- tablegen -*-===//
400 //===--------------- Variable Argument Handling Intrinsics ----------------===//
408 //===------------------- Garbage Collection Intrinsics --------------------===//
420 //===------------------- ObjC ARC runtime Intrinsics --------------------===//
1260 //===------------------------ Coroutine Intrinsics ---------------===//
1263 // Coroutine Structure Intrinsics.
1323 // Coroutine Manipulation Intrinsics.
1334 // Coroutine Lowering Intrinsics. Used internally by coroutine passes.
1381 // Intrinsics to support half precision floating point format
1410 //===---------------- Vector Predication Intrinsics --------------===//
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H A DIntrinsicsXCore.td94 // Intrinsics for events.
104 // Intrinsics for threads.
H A DCMakeLists.txt4 set(LLVM_TARGET_DEFINITIONS Intrinsics.td)
H A DIntrinsicsPowerPC.td41 // Intrinsics for [double]word extended forms of divide instructions
129 // Intrinsics defined to maintain XL compatibility
613 // P10 Move to VSR with Mask Intrinsics.
633 // P10 Vector String Isolate Intrinsics.
642 // Predicate Intrinsics: The first operand specifies interpretation of CR6.
1114 // Power8 Intrinsics
1185 // Vector Divide Extended Intrinsics.
1193 // Vector Multiply High Intrinsics.
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaRISCVVectorLookup.cpp139 StringMap<size_t> Intrinsics; member in __anon0af9afd90211::RISCVIntrinsicManagerImpl
291 Intrinsics.insert({Name, Index}); in InitRVVIntrinsic()
379 auto Itr = Intrinsics.find(Name); in CreateIntrinsicIfFound()
380 if (Itr != Intrinsics.end()) { in CreateIntrinsicIfFound()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DInstCombineTables.td2 include "llvm/IR/Intrinsics.td"
/llvm-project-15.0.7/mlir/include/mlir/Dialect/X86Vector/
H A DX86Vector.td75 #### From the Intel Intrinsics Guide:
127 #### From the Intel Intrinsics Guide:
183 #### From the Intel Intrinsics Guide:
246 #### From the Intel Intrinsics Guide:
/llvm-project-15.0.7/flang/docs/
H A Dindex.md53 Intrinsics
/llvm-project-15.0.7/llvm/docs/
H A DNVPTXUsage.rst88 spaces, with 0 being the default address space. Intrinsics are provided which
127 NVPTX Intrinsics
133 '``llvm.nvvm.ptr.*.to.gen``' Intrinsics
161 '``llvm.nvvm.ptr.gen.to.*``' Intrinsics
255 Other Intrinsics
544 Target Intrinsics
582 instructions. Intrinsics are provided to convert pointers between the generic
H A DAddingConstrainedIntrinsics.rst18 include/llvm/IR/Intrinsics.td
H A DPointerAuth.md27 ### Intrinsics subsection
290 The IR [Intrinsics](#intrinsics) described above map onto these
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dintrin-properties.td17 include "llvm/IR/Intrinsics.td"
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A DO0-pipeline.ll29 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
/llvm-project-15.0.7/llvm/docs/GlobalISel/
H A DIRTranslator.rst38 Target Intrinsics
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A DO0-pipeline.ll25 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp2506 SmallVectorImpl<CallInst *> &Intrinsics, in inlineGetBaseAndOffset() argument
2513 for (auto *Callsite : Intrinsics) in inlineGetBaseAndOffset()
2971 SmallVector<CallInst *, 64> Intrinsics; in runOnFunction() local
2986 Intrinsics.emplace_back(CI); in runOnFunction()
2990 if (ParsePointNeeded.empty() && Intrinsics.empty()) in runOnFunction()
3069 if (!Intrinsics.empty()) in runOnFunction()
3072 MadeChange |= inlineGetBaseAndOffset(F, Intrinsics, DVCache, KnownBases); in runOnFunction()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A DO0-pipeline.ll29 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
/llvm-project-15.0.7/llvm/test/Transforms/LoopRotate/
H A Dcall-prepare-for-lto.ll45 ; Intrinsics, like @llvm.dbg.value are never inlined and should not block loop

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