[GlobalISel][SelectionDAG] Implement the HasNoUse builtin predicate

This change introduces the HasNoUse builtin predicate in PatFrags that
checks for the absence of use of the first result operand.

[GlobalISel][SelectionDAG] Implement the HasNoUse builtin predicate

This change introduces the HasNoUse builtin predicate in PatFrags that
checks for the absence of use of the first result operand.
GlobalISelEmitter will allow source PatFrags with this predicate to be
matched with destination instructions with empty outs. This predicate is
required for selecting the no-return variant of atomic instructions in
AMDGPU.

Differential Revision: https://reviews.llvm.org/D125212

show more ...

[TableGen] Move printing to stream directly to MachineValueTypeSet

Cleanup includes: DebugInfo & CodeGen

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121332

[TableGen] Fix both sides of '&&' are same

The operand of the second any_of in EnforceSmallerThan should be
B not S like the FP code in the if below.

Unfortunately, fixing that causes an infinite l

[TableGen] Fix both sides of '&&' are same

The operand of the second any_of in EnforceSmallerThan should be
B not S like the FP code in the if below.

Unfortunately, fixing that causes an infinite loop in the build
of RISCV. So I've added a workaround for that as well.

Fixes PR44768.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111502

show more ...

[TableGen] Store predicates in PatternToMatch as ListInit *. Add string for HwModeFeatures

This uses to be how predicates were handled prior to HwMode being
added. When the Predicates were converted

[TableGen] Store predicates in PatternToMatch as ListInit *. Add string for HwModeFeatures

This uses to be how predicates were handled prior to HwMode being
added. When the Predicates were converted to a std::vector it
significantly increased the cost of a compare in GenerateVariants.
Since ListInit's are uniquified by tablegen, we can use a simple
pointer comparison to check for identical lists.

In order to store the HwMode, we now add a separate string to
PatternToMatch. This will be appended separately to the predicate
string in getPredicateCheck. A new getPredicateRecords is added
to allow GlobalISel and getPredicateCheck to both get the sorted
list of Records. GlobalISel was ignoring any HwMode predicates
before and still is.

There is one slight change here, ListInits with different predicate
orders aren't sorted so the filtering in GenerateVariants might
fail to detect two isomorphic patterns with different predicate
orders. This doesn't seem to be happening in tree today.

My hope is this will allow us to remove all the BitVector tracking
in GenerateVariants that was making up for predicates beeing
expensive to compare. There's a decent amount of heap allocations
there on large targets like X86, AMDGPU, and RISCV.

Differential Revision: https://reviews.llvm.org/D100691

show more ...

[TableGen] Predicate::operator== needs to compare the HwMode feature name in addition to the HwMode flag.

This was causing GenerateVariants to lose some variants since
HwMode is expanded first. We w

[TableGen] Predicate::operator== needs to compare the HwMode feature name in addition to the HwMode flag.

This was causing GenerateVariants to lose some variants since
HwMode is expanded first. We were mistakenly thinking the HwMode
predicate matched and finding the variant was isomorphic to a
pattern in another HwMode and discarding it.

Found while investigating it if would be better to generate
variants before expanding HwModes to improve RISCV build time.
I noticed an increase in the number of Opc_MorphNodeTo in the table
which indicated that the number of patterns had changed.

show more ...

[TableGen] Reduce the number of map lookups in TypeSetByHwMode::getOrCreate. NFCI

hasMode was looking up the map once. Then we'd either call get which
would look up again, or we'd insert into the ma

[TableGen] Reduce the number of map lookups in TypeSetByHwMode::getOrCreate. NFCI

hasMode was looking up the map once. Then we'd either call get which
would look up again, or we'd insert into the map which requires
walking the map to find the insertion point.

I believe the hasMode was needed because get has a special case
to look for DefaultMode if the mode being asked for doesn't exist.
We don't want that here so we were using hasMode to make sure we
wouldn't hit that case.

Simplify to a regular operator[] access which will default
construct a SetType if the lookup fails.

show more ...

[TableGen] Make all the fields in PatternToMatch private. NFCI

Add the few missing accessor methods. Use accessor methdods
everywhere.

[TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a StringRef instead of const std::string &.

All callers use a string literal and the getDef method the string
is passed to already takes a Str

[TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a StringRef instead of const std::string &.

All callers use a string literal and the getDef method the string
is passed to already takes a StringRef.

show more ...

[TableGen] Delete 11 unused declarations

CodeGenDAGPatterns.h - remove unnecessary ComplexPattern forward declaration. NFCI.

This is defined in CodeGenTarget.h which we have to explicitly include already.

CodeGenDAGPatterns.h - remove unused CodeGenHwModes.h include. NFCI.

[TableGen] Change std::vector to SmallVector

The size of VTList that is pushed into this container is usually 1, but
often 6 or 7. Change the vector to SmallVector to eliminate frequent
mallocs. Th

[TableGen] Change std::vector to SmallVector

The size of VTList that is pushed into this container is usually 1, but
often 6 or 7. Change the vector to SmallVector to eliminate frequent
mallocs. This happens hundreds of thousands of times in each tablegen
execution during the LLVM/clang build.

https://reviews.llvm.org/D83849

show more ...

Make llvm::StringRef to std::string conversions explicit.

This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly m

Make llvm::StringRef to std::string conversions explicit.

This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly mechanical from a custom clang-tidy check, with a lot of
manual fixups. It uncovers a lot of minor inefficiencies.

This doesn't actually modify StringRef yet, I'll do that in a follow-up.

show more ...

TableGen: Remove unused code

[TableGen] Remove unused target intrinsic generation logic

AMDGPU was the last in tree target to use this tablegen mode. I plan to
split up the global intrinsic enum similar to the way that clang
di

[TableGen] Remove unused target intrinsic generation logic

AMDGPU was the last in tree target to use this tablegen mode. I plan to
split up the global intrinsic enum similar to the way that clang
diagnostics are split up today. I don't plan to build on this mode.

Reviewers: arsenm, echristo, efriedma

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D71318

show more ...

Reland 'Fixed -Wdeprecated-copy warnings. NFCI.'

Fixed hashtable copy ctor.

Revert 'Fixed -Wdeprecated-copy warnings. NFCI.'

pdbutil's test is failing.

Fixed -Wdeprecated-copy warnings. NFCI.

TableGen: Add MinAlignment predicate

AMDGPU uses some custom code predicates for testing alignments.

I'm still having trouble comprehending the behavior of predicate bits
in the PatFrag hierarchy.

TableGen: Add MinAlignment predicate

AMDGPU uses some custom code predicates for testing alignments.

I'm still having trouble comprehending the behavior of predicate bits
in the PatFrag hierarchy. Any attempt to abstract these properties
unexpectdly fails to apply them.

llvm-svn: 367373

show more ...

AMDGPU: Avoid emitting "true" predicates

Empty condition strings are considerde always true. This removes a lot
of clutter from the generated matcher tables.

This shrinks the source size of AMDGPUG

AMDGPU: Avoid emitting "true" predicates

Empty condition strings are considerde always true. This removes a lot
of clutter from the generated matcher tables.

This shrinks the source size of AMDGPUGenDAGISel.inc from 7.3M to
6.1M.

llvm-svn: 367326

show more ...

TableGen: Add address space to matchers

Currently AMDGPU uses a CodePatPred to check address spaces from the
MachineMemOperand. Introduce a new first class property so that the
existing patterns can

TableGen: Add address space to matchers

Currently AMDGPU uses a CodePatPred to check address spaces from the
MachineMemOperand. Introduce a new first class property so that the
existing patterns can be easily modified to uses the new generated
predicate, which will also be handled for GlobalISel.

I would prefer these to match against the pointer type of the
instruction, but that would be difficult to get working with
SelectionDAG compatbility. This is much easier for now and will avoid
a painful tablegen rewrite for all the loads and stores.

I'm also not sure if there's a better way to encode multiple address
spaces in the table, rather than putting the number to expect.

llvm-svn: 366128

show more ...

[TableGen] Allow DAG isel patterns to override default operands.

When a Tablegen instruction description uses `OperandWithDefaultOps`,
isel patterns for that instruction don't have to fill in the de

[TableGen] Allow DAG isel patterns to override default operands.

When a Tablegen instruction description uses `OperandWithDefaultOps`,
isel patterns for that instruction don't have to fill in the default
value for the operand in question. But the flip side is that they
actually //can't// override the defaults even if they want to.

This will be very inconvenient for the Arm backend, when we start
wanting to write isel patterns that generate the many MVE predicated
vector instructions, in the form with predication actually enabled. So
this small Tablegen fix makes it possible to write an isel pattern
either with or without values for a defaulted operand, and have the
default values filled in only if they are not overridden.

If all the defaulted operands come at the end of the instruction's
operand list, there's a natural way to match them up to the arguments
supplied in the pattern: consume pattern arguments until you run out,
then fill in any missing instruction operands with their default
values. But if defaulted and non-defaulted operands are interleaved,
it's less clear what to do. This does happen in existing targets (the
first example I came across was KILLGT, in the AMDGPU/R600 backend),
and of course they expect the previous behaviour (that the default for
those operands is used and a pattern argument is not consumed), so for
backwards compatibility I've stuck with that.

Reviewers: nhaehnle, hfinkel, dmgreen

Subscribers: mehdi_amini, javed.absar, tpr, kristof.beyls, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63814

llvm-svn: 365114

show more ...

Add support for pointer types in patterns

Summary:
This adds support for defining patterns for global isel using pointer
types, for example:

def : Pat<(load GPR32:$src),
(p1 (LOAD GPR32:$

Add support for pointer types in patterns

Summary:
This adds support for defining patterns for global isel using pointer
types, for example:

def : Pat<(load GPR32:$src),
(p1 (LOAD GPR32:$src))>;

DAGISelEmitter will ignore the pointer information and treat these
types as integers with the same bit-width as the pointer type.

Reviewers: dsanders, rtereshin, arsenm

Reviewed By: arsenm

Subscribers: Petar.Avramovic, wdng, rovka, kristof.beyls, jfb, volkan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57065

llvm-svn: 354510

show more ...

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

show more ...