Searched refs:IntReg (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1309 for (unsigned IntReg = LargestIntReg - 1; in computeRegisterProperties() local
1310 IntReg >= (unsigned)MVT::i1; --IntReg) { in computeRegisterProperties()
1311 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties()
1313 LegalIntReg = IntReg; in computeRegisterProperties()
1315 RegisterTypeForVT[IntReg] = TransformToType[IntReg] = in computeRegisterProperties()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 135 bool selectIntToBool(Register IntReg, Register ResVReg,
974 bool SPIRVInstructionSelector::selectIntToBool(Register IntReg, in selectIntToBool() argument
989 .addUse(IntReg) in selectIntToBool()
1004 Register IntReg = I.getOperand(1).getReg(); in selectTrunc() local
1005 const SPIRVType *ArgType = GR.getSPIRVTypeForVReg(IntReg); in selectTrunc()
1006 return selectIntToBool(IntReg, ResVReg, ArgType, ResType, I); in selectTrunc()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1256 unsigned IntReg = Subtarget->hasSPE() in SelectFPToI() local
1260 if (IntReg == 0) in SelectFPToI()
1263 updateValueMap(I, IntReg); in SelectFPToI()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1622 Register IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg() local
1624 if (!IntReg) in selectFNeg()
1628 IntVT.getSimpleVT(), ISD::XOR, IntReg, in selectFNeg()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1595 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg); in SelectFPToI() local
1596 if (IntReg == 0) return false; in SelectFPToI()
1598 updateValueMap(I, IntReg); in SelectFPToI()
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